Electronic Parts Substrate Symmetric Cavities Thermal Stress
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Solution Overview
Problem
Multilayered resin boards with high thermal expansion coefficients face reliability issues due to thermal stress, leading to cracks and disconnection in insulating resin layers and conductive circuits, unlike low thermal expansion coefficient ceramic boards.
Innovation Solution
An electronic parts substrate with a base substrate, insulating resin layers, conductive circuits, and filled vias, featuring symmetrically formed cavities on the top and bottom surfaces to equalize thermal stress, along with a solder resist layer to absorb thermal stress and copper foils for electromagnetic shielding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If cavities are formed in an electronic parts substrate having a lamination of insulating resins, then the height of the substrate can be suppressed, but the thermal expansion coefficient of the insulating resin is high making thermal stress locally greater and causing cracks and disconnection
Solution Approach 1:
The patent changes the material parameter of the insulating resin from conventional high thermal expansion coefficient resins to low thermal expansion coefficient resins (such as BT resin with coefficient of 15 or less). This parameter change reduces the thermal stress generated during heat contraction, preventing cracks and disconnection while maintaining the cavity structure for height suppression.
Solution Approach 2:
The patent uses composite material structures combining low thermal expansion coefficient insulating resin layers with copper foils and solder resist layers. The composite structure includes multiple resin layers (first insulating resin layer, second insulating resin layer) with different properties to achieve both height suppression through cavities and thermal stress reduction through material selection.
2Device complexity
If multilayered resin boards are used to suppress height, then compact design is achieved, but thermal stress causes cracks and disconnection due to high thermal expansion coefficient
Solution Approach 1:
The patent fundamentally changes the thermal expansion parameter of the insulating resin material, selecting materials with coefficients of 15 or less (such as BT resin, polyimide, or polyester resins). This parameter change enables the resin board to withstand thermal stress during heat contraction without cracking, while maintaining the multilayered compact design for height suppression.
Solution Approach 2:
The patent applies different material properties to different regions: the insulating resin layers use low thermal expansion coefficient materials for thermal stress resistance, while copper foils provide electromagnetic shielding and conductive pathways. The solder resist layers provide thermal stress absorption and electrical insulation, creating local quality differentiation that addresses both compact design and reliability requirements.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces the likelihood of cracks and disconnection during heat contraction, enhancing the reliability and miniaturization of electronic parts substrates by equalizing thermal stress and using flexible solder resist layers to absorb thermal stress.
Implementation Method 1
the thermal expansion coefficient of the insulating resin is high, making the thermal stress locally greater due to the influence of the cavities
Implementation Method 2
using flexible solder resist layers to absorb thermal stress
Implementation Method 3
copper foils for electromagnetic shielding
Implementation Method 4
The second upper resin layer and the first upper copper foil are cut along a periphery of the preformed opening using a laser
Data Source
AI summary
An electronic parts substrate includes a base substrate, a plurality of insulating resin layers provided on the base substrate, at least one conductive circuit, and at least one filled via provided in the plurality of insulating resin layers. The at least one conductive circuit is sandwiched between the plurality of insulating resin layers and/or between the base substrate and the plurality of insulating resin layers. At least one opening is formed in at least one of the plurality of insulating resin layers.