Substrate Via Layout for Warpage Control in Electronic Packaging
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing electronic device packaging structures face challenges in preventing uneven stress, which can lead to substrate warping, affecting the yield of electronic components.
Innovation Solution
The introduction of a dummy via pattern in the substrate structure, which is electrically insulated from the circuit structure, helps to balance stress and prevent warping, while maintaining the electrical requirements of the conductive via pattern.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If fan-out wafer-level package or fan-out panel-level package is used, then large number of packaged elements can be formed simultaneously, but substrate warping occurs due to uneven stress from thickness difference of film layers
Solution Approach 1:
The patent introduces dummy via patterns that replicate the structure and stress characteristics of actual conductive vias but are electrically insulated. These dummy vias serve as stress compensation copies, creating balanced stress distribution across the substrate without disrupting electrical functionality. The dummy vias are positioned in non-critical areas to mirror the stress profile of the conductive via pattern.
Solution Approach 2:
The patent modifies the physical and electrical parameters of certain via structures by making them electrically insulated while maintaining their physical presence in the substrate. This parameter change allows the via structures to serve dual purposes: maintaining stress balance through their physical configuration while preventing electrical interference through insulation. The insulation parameter is specifically adjusted to achieve stress compensation without electrical connectivity.
2Stability of the object's composition
If dummy via pattern is added to balance stress, then substrate warping is prevented, but device structure becomes more complex
Solution Approach 1:
The patent merges the formation of dummy vias and conductive vias into a single integrated process sequence. Both via types are created using the same fabrication steps including via hole formation, liner deposition, and fill processes. The dummy vias are incorporated into the existing via pattern design rather than being added as a separate structural element, thereby minimizing additional process complexity while achieving stress balance.
Solution Approach 2:
The patent extracts the stress-balancing function from the electrical conduction function by creating electrically insulated dummy vias. This separation allows the via structures to independently perform stress compensation without interfering with electrical signal paths. The electrical insulation parameter is specifically designed to decouple the mechanical and electrical functions of the via structures.
3Reliability
If dummy via pattern is electrically insulated from circuit structure, then electrical interference is prevented, but manufacturing precision requirements increase
Solution Approach 1:
The patent segments the via structures into two distinct categories: conductive vias for electrical connection and insulated dummy vias for stress compensation. This segmentation allows each via type to be optimized for its specific function. The insulation layer is applied selectively to dummy vias, creating a clear distinction between conductive and non-conductive via structures. This segmentation simplifies the design rules and inspection criteria compared to attempting to control electrical properties of all vias uniformly.
Data Source
AI summary
An electronic device is provided. The electronic device includes a substrate structure, a control unit, a first circuit structure, and an electronic unit. The substrate structure has a conductive via pattern and a dummy via pattern. The control unit is electrically connected to the conductive via pattern. The first circuit structure is electrically connected to the conductive via pattern. The electronic unit is electrically connected to the control unit through the first circuit structure. The dummy via pattern is electrically insulated from the first circuit structure.