Subword Driver Layout With Shared Transistors for Tighter Memory Pitch
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Solution Overview
Problem
The scaling down of array access devices in semiconductor fabrication leads to higher pitch and congestion in local interconnections within memory cell arrays, particularly in subword driver blocks, which hinders efficient operation of semiconductor memory devices like DRAM.
Innovation Solution
The implementation of subword drivers coupled in cascade connections reduces the number of transistors per subword driver, allowing for a more compact layout and lower interconnection pitch by sharing common transistors between adjacent subword drivers, thereby optimizing the layout and reducing memory die size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If subword drivers are implemented with conventional layout, then each subword driver requires separate transistors, but this increases the number of transistors and interconnection pitch
Solution Approach 1:
Adjacent subword drivers share common transistors (specifically, the pull-down transistors connected to bit lines and pull-up transistors connected to word lines), merging previously separate components into shared resources. This reduces the total transistor count and allows closer spacing of interconnections between subword drivers and memory cell arrays.
Solution Approach 2:
The shared transistors serve multiple subword drivers simultaneously, making these components multi-functional. A single transistor can be controlled by multiple word driver lines to drive different word lines belonging to different subword drivers, thereby reducing overall device complexity and interconnection requirements.
2Reliability
If more transistors are used per subword driver, then subword driver functionality is ensured, but memory die size increases
Solution Approach 1:
By merging the pull-down and pull-up transistor networks between adjacent subword drivers, the patent reduces redundant components while maintaining full subword driver functionality. Each subword driver retains its independent control through word driver lines while sharing physical transistor implementations with neighbors.
Solution Approach 2:
The patent eliminates redundant transistors that would otherwise be duplicated in each subword driver, recovering space and reducing die size. The shared transistor configuration discards unnecessary duplicates while recovering functional equivalence through clever control line routing and transistor sharing arrangements.
Data Source
AI summary
In some examples, a subword driver block of a memory device includes a first active region and a second active region adjacent to each other. The first active region forms drains/sources of a first and second transistors in a first region; the second active region forms drains/sources of a third and fourth transistors in a second region, where the first and second regions are adjacent to each other. The first, second, third and fourth transistors are coupled to a common non-active potential via a shared contact overlaid over a merged region between the first and second regions. The first and second active regions may comprise N+ diffusion materials.