Sub-word Line Driver With Common Gate Boosted Voltage
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Solution Overview
Problem
In memory devices, the use of high voltages in local word line drivers can cause reliability issues and increase the semiconductor substrate area, leading to higher costs or reduced capacity, as booster circuits are required to avoid these high voltages, which in turn occupy more layout area.
Innovation Solution
Implementing sub-word line drivers with common gate boosted voltage, utilizing NMOS transistors and Metal Insulator Metal (MIM) capacitors to reduce the semiconductor substrate area by sharing boost circuits and transistors across multiple word lines, thereby reducing the layout area and costs while maintaining reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high voltages are used in local word line drivers, then the switching speed and drive capability are improved, but the reliability deteriorates and the semiconductor substrate area increases
Solution Approach 1:
The patent divides the word line driver into global word line drivers and local word line drivers. The global drivers handle high-voltage switching for speed, while local drivers operate at lower voltages for reliability. This segmentation allows each part to optimize for its specific function without compromising the other.
Solution Approach 2:
The patent introduces intermediate voltage levels and buffer circuits between the high-voltage global drivers and the low-voltage local drivers. These intermediaries transfer signals while maintaining voltage compatibility, allowing high-speed operation at the global level without exposing the local level to high voltage stress.
2Reliability
If booster circuits are added to avoid high voltages, then the reliability is improved, but the layout area increases
Solution Approach 1:
The patent merges the functions of multiple local word line drivers by sharing common boost circuits and transistors across adjacent drivers. This consolidation reduces the total number of redundant components while maintaining the reliability benefits of lower operating voltages in the local driver stage.
Solution Approach 2:
The patent designs shared boost circuits and transistor networks that serve multiple local word line drivers simultaneously. These universal components perform the same voltage-boosting function for different drivers, eliminating the need for separate dedicated circuits in each driver and thereby reducing overall layout area.
Data Source
AI summary
A boost circuit is used to provide boosting voltage to a common boost node of a plurality of sub-word line drivers in memory systems and devices. The boost circuit includes a Metal Insulator Metal Capacitor. By using the boost circuit, the plurality of sub-word line drivers are configured to output a certain voltage to local word lines without using high DC generators to generate high voltages (4.2 volts or more). The area of the semiconductor substrate used for fabricating the sub-word line drivers is reduced, and thus reduce the cost or increasing the capacity of the memory devices.