Super Junction Device Fabrication via Inverted Gate Sequence
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Solution Overview
Problem
The existing methods for making super junction devices face challenges due to mutual diffusion of impurities during thermal processes, which affects the device's performance, particularly as the pitch of the super junction decreases, leading to increased on-resistance and reduced doping concentration of N-type pillars.
Innovation Solution
An all flat process is adopted where the gate structure is formed before the super junction, eliminating the need for slope-climbing structures and reducing thermal processes, thereby minimizing impurity diffusion and improving device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the pitch of the super junction is reduced to improve device integration, then the device density increases, but the mutual diffusion of P-type and N-type impurities becomes more serious, leading to increased on-resistance and reduced doping concentration
Solution Approach 1:
The gate structure is formed before the super junction structure, and the leading-out position of the gate structure is prepared in advance to enable direct contact formation. This preliminary arrangement eliminates the need for subsequent slope-climbing structures and reduces the number of thermal processes required, thereby minimizing impurity diffusion even at reduced pitch dimensions
Solution Approach 2:
The conventional sequence is inverted: instead of forming the super junction first and then the gate structure, the gate structure is formed first. This inversion allows the gate leading-out position to be directly accessible for contact formation, eliminating the need for slope-climbing structures that would otherwise require additional thermal processes and cause impurity diffusion
2Ease of manufacture
If slope-climbing structures are used to lead out the gate structure, then the gate can be formed after the super junction, but the process requires more thermal steps and increases impurity diffusion
Solution Approach 1:
The gate structure and its leading-out position are formed in advance before the super junction structure. This preliminary formation eliminates the need for slope-climbing structures that would require additional thermal processes, thereby reducing thermal damage and impurity diffusion while maintaining manufacturing flexibility
3Manufacturing precision
If multiple masks are used in the fabrication process, then precise pattern formation is achieved, but the process complexity and number of steps increase
Solution Approach 1:
The gate structure formation and super junction formation processes are merged into a single fabrication sequence without requiring intermediate slope-climbing structures. The leading-out position of the gate structure is designed to directly receive contacts, combining multiple functions into fewer process steps and reducing the total number of masks required
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the adverse effects of thermal processes on the super junction, leading to improved device performance by maintaining low on-resistance and high doping concentration, while also simplifying the fabrication process and reducing the number of required masks.
Implementation Method 1
impurities in the P-type pillars 104 and N-type pillars of the super junction will mutually diffuse in the thermal process
Data Source
AI summary
A method for making a super junction device includes the following steps: step 1: forming a trench gate, in the forming process of the trench gate, a polysilicon gate being used to fill gate trenches and then first flattening being performed and the width of the gate trench at the leading-out position of the gate structure satisfies the requirement of forming contacts; and step 2: forming a super junction, in the forming process of the super junction, a second epitaxial layer being used to fill a super junction trench and then second flattening being performed. The method can realize an all flat process, can conveniently arrange the trench gate process before the forming process of the super junction, can decrease the thermal processes after the formation of the super junction, can save the mask and can decrease the process cost.