Super-threading Integrated Circuit Design Parallel Processing
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Solution Overview
Problem
The time-consuming process of integrated circuit design hinders the ability to meet market demands, as existing methods require extensive design time, which can lead to missed sales opportunities and increased costs.
Innovation Solution
The implementation of a system that generates and shares work scripts across multiple computer systems using a master-slave process architecture, allowing for parallel processing and super-threading to distribute the workload efficiently, reducing the need for a complete netlist and minimizing the information required for debugging by creating debug work scripts that include only the necessary commands and context.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If parallel processing and super-threading are implemented to reduce design time, then productivity is improved, but device complexity increases due to multiple computer systems and master-slave process architecture
Solution Approach 1:
The patent divides the integrated circuit design process into separate work scripts that can be independently executed on different computer systems. Each work script processes a specific portion of the design, allowing parallel execution across multiple systems while maintaining overall system manageability through modularization.
Solution Approach 2:
The patent introduces a master process as an intermediary that coordinates between the master computer system and slave computer systems. The master process manages work script distribution, collects results, and synchronizes operations, thereby simplifying the complexity of multi-system coordination without requiring direct peer-to-peer communication between all systems.
2Productivity
If work scripts are shared across multiple computer systems to enable parallel processing, then productivity is improved, but loss of information increases due to the need to transmit and manage work scripts between systems
Solution Approach 1:
The patent creates copies of work scripts that can be independently executed on different computer systems. Each slave system receives a copy of the relevant work script portion, allowing parallel processing without requiring continuous data transmission or shared memory, thereby reducing information loss risks associated with inter-system communication.
Solution Approach 2:
The work script is segmented into discrete, self-contained portions that can be independently transmitted and executed. Each segment contains all necessary information to be processed autonomously, minimizing the need for additional data exchange and reducing the risk of information loss during transmission between master and slave systems.
3Measurement precision
If complete netlist is required for debugging, then measurement precision is improved, but loss of time increases due to the time needed to process and analyze the complete netlist
Solution Approach 1:
The patent extracts only the necessary portions of the work script related to the fault being investigated. Instead of analyzing the complete netlist, the system identifies and processes only the specific work script segments that contain information relevant to the fault, thereby reducing analysis time while maintaining sufficient debugging accuracy.
Solution Approach 2:
The patent applies partial action by processing only the necessary subset of work scripts required for fault diagnosis rather than the complete set. This selective processing approach maintains adequate measurement precision for debugging while significantly reducing the time required to analyze the entire netlist.
Data Source
AI summary
In one embodiment of the invention, a method is disclosed including receiving a netlist of an integrated circuit design; executing a first copy of an integrated circuit design program with a first processor associated with a first memory space to independently perform work on a first portion of the integrated circuit design; and executing a second copy of the integrated circuit design program with a second processor associated with a second memory space to independently perform work on a second portion of the integrated circuit design; wherein the second memory space is independent of the first memory space.