Fabrication of Through-Silicon Vias
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Solution Overview
Problem
Current packaging processes lack the development of superconducting and thermally conductive through-silicon vias (TSVs) capable of accommodating higher current density, lower losses, and dual operating temperatures, which are essential for advanced cryogenic technologies and 3D integrated circuits.
Innovation Solution
A superconducting TSV is fabricated with a core of conducting material and an outer layer of superconducting material, separated by an insulating oxide layer, enabling hybrid Cu/NbTiN metallization on silicon interposers for thermally-decoupled heterogeneous systems with dual operating temperatures.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a conventional single-material TSV is used, then the fabrication process is simple, but it cannot simultaneously achieve high current density, low losses, and dual operating temperature capability
Solution Approach 1:
The patent employs a composite TSV structure with a copper core providing high thermal and electrical conductivity for standard conductive interconnect, surrounded by a superconducting material shell (such as NbTiN) enabling lossless current transport at cryogenic temperatures. This composite architecture allows the same TSV to support both room temperature and cryogenic operating modes, achieving dual temperature capability while maintaining low fabrication complexity through sequential deposition processes
2Use of energy by moving object
If superconducting material is deposited on the TSV, then current density and power efficiency are improved, but thermal management becomes more complex due to thermal decoupling requirements
Solution Approach 1:
The patent segments the TSV into distinct functional regions: a copper core for thermal conduction and standard electrical interconnect, and a superconducting shell for lossless current transport at cryogenic temperatures. This segmentation allows independent optimization of thermal and electrical pathways, enabling the superconducting layer to reduce power consumption while the copper core maintains thermal coupling to heat sinks, thereby simplifying overall thermal management despite the heterogeneous material structure
3Productivity
If hybrid Cu/NbTiN metallization is implemented, then circuit density and clock rates are increased, but the fabrication process complexity increases
Solution Approach 1:
The patent employs preliminary surface preparation steps including oxide formation and pattern definition before superconducting material deposition. The copper core structure is first fabricated using standard CMOS-compatible processes, then an insulating oxide layer is deposited and patterned to define the TSV regions. Finally, the superconducting material is deposited conformally on the prepared surfaces. This preliminary action sequence enables the complex hybrid metallization to be integrated into existing CMOS fabrication workflows, maintaining ease of manufacture while achieving high circuit density and increased clock rates
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables higher circuit density, reduced power consumption, and increased clock rates, facilitating advanced AI and high-performance computing applications, while supporting heterogeneous architectures and quantum computing developments.
Implementation Method 1
The outer layer includes a superconductive material
Implementation Method 2
an insulating layer that electrically insulates the core and the outer layer from one another
Data Source
AI summary
A through-silicon via (TSV) and methods for its manufacture are disclosed. An example TSV includes a core that extends through a substrate along an axis. The core includes a conductive material. The TSV also includes an outer layer that is disposed about the axis. The outer layer is at least partially surrounding the core. The outer layer includes a superconductive material. The TSV additionally includes an insulating layer that electrically insulates the core and the outer layer from one another.