Discrete-Time Superheterodyne Mixer With Sample Reordering
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Solution Overview
Problem
Conventional receivers, such as zero-intermediate frequency (zero-IF) receivers, are vulnerable to interference from harmonic blockers, while superheterodyne receivers require costly and power-hungry filters for image rejection, and both types face challenges in handling multiple frequency signals in LTE Carrier Aggregation, leading to signal degradation and increased size and cost.
Innovation Solution
A receiver design incorporating a sample reordering circuit and a complex local oscillating signal to reorder discrete-time samples and generate a desired mixing waveform, allowing for operation in multiple modes to suppress harmonic blockers and achieve negative frequency image rejection without the need for off-chip filters, enhancing signal quality and agility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a zero-intermediate frequency receiver is used, then the receiver architecture is simplified, but the receiver becomes vulnerable to interference from harmonic blockers
Solution Approach 1:
The patent implements dynamic mode switching between zero-IF and superheterodyne receiver modes based on detection of harmonic blockers. The system transitions from a static architecture to a dynamic one that adapts to signal conditions, allowing it to maintain simplicity while protecting against interference by switching modes when blockers are detected
Solution Approach 2:
The patent changes the operating parameter of the receiver by switching between different intermediate frequency modes. When harmonic blockers are detected, the system changes from zero-IF mode to superheterodyne mode with a non-zero intermediate frequency, thereby altering the frequency parameters to avoid interference while maintaining architectural flexibility
2Reliability
If a conventional superheterodyne receiver is used, then image rejection is improved, but the receiver requires power-hungry filters and has off-chip architecture
Solution Approach 1:
The patent implements dynamic mode switching that allows the receiver to operate in superheterodyne mode only when image rejection is required, rather than continuously. This dynamic approach reduces overall power consumption by using the power-intensive superheterodyne architecture selectively rather than permanently
Solution Approach 2:
The patent creates a universal receiver architecture that can function in both zero-IF and superheterodyne modes using the same core components. This multi-functionality allows the system to achieve image rejection when needed while avoiding the need for separate dedicated hardware, thereby reducing overall power consumption and integration requirements
3Reliability
If a conventional superheterodyne receiver is used, then image rejection is improved, but the receiver requires off-chip architecture and large filters
Solution Approach 1:
The patent merges the zero-IF and superheterodyne receiver architectures into a single integrated system. By combining both modes in one chip with shared components, the patent eliminates the need for off-chip filters and achieves compact integration while maintaining image rejection capability when needed
Solution Approach 2:
The patent creates a universal integrated receiver that performs both zero-IF and superheterodyne functions using shared on-chip components. This multi-functional design achieves image rejection without requiring separate off-chip filter hardware, thereby improving integration and reducing device complexity
4Adaptability or versatility
If the receiver operates in multiple frequency signals for LTE Carrier Aggregation, then communication capability is improved, but signal degradation occurs
Solution Approach 1:
The patent implements dynamic mode switching that adapts to different frequency signal conditions in LTE Carrier Aggregation. The system can dynamically transition between zero-IF and superheterodyne modes for different carrier frequencies, optimizing signal quality for each frequency band rather than using a fixed architecture that degrades across multiple frequencies
Data Source
AI summary
A receiver includes one or more mixers configured to sample an input analog signal at a plurality of discrete points in time to obtain a discrete-time sampled signal based on a local oscillating signal provided by a local oscillator; and a sample reordering circuit coupled to the one or more mixers and configured to reorder a sequence of samples received from the one or more mixers.