Modulation Transference By Semiconductor Devices With Minimum 2 Electrodes TRIZ Cases

Balanced secondary windings and adaptive modulation cut common-mode noise, thermal stress, and converter size in battery power conversion.

Four-phase detection signals calibrate I/Q gain mismatch in a direct-conversion receiver, improving IMRR and interference suppression.

Independent front- and back-gate biasing lets an RF mixer tune LO switching and IP2 separately, cutting distortion and chip area.

A synchronized FET pair and diplexer separate RF and IF signals to improve mixer isolation and linearity without baluns.

Voltage-to-current bio-impedance sensing improves common-mode noise rejection and enables accurate, low-power wearable monitoring.

Using phase-synthesized RF and IF outputs, this mixer cuts IF and LO leakage while preserving wideband operation.

Separate front- and back-gate biasing lets an RF mixer tune IP2 independently, cutting intermodulation distortion and chip area.

Three bias DACs trim DC mismatch, impedance, and LO levels in a mixer to suppress feedthrough, harmonic gain, and in-band spurs.

Current-mode bio-impedance sensing improves common-mode noise rejection and enables precise wearable measurements without an anti-aliasing filter.

Independent I/Q LO amplitude detection adjusts mixer bias to correct IQ imbalance and improve image rejection at mmWave and sub-THz frequencies.

An SP3T mixer-first receiver rejects third-harmonic interference without pre-filters, preserving wide frequency range, linearity, and dynamic range.

A matched sub-MOSFET bias circuit stabilizes gate and source-drain voltages to preserve passive mixer linearity across temperature changes.

Phased DAC trimming in a four-transistor mixer cuts LO feedthrough, harmonic conversion gain, and spurious wireless interference.

A heterodyne mixer circuit expands IF bandwidth to 0-70 GHz, replacing multiple mixers with one compact receiver for broadband detection.

Synchronized passive mixing and high-order switched-capacitor filtering cut receiver power use while reducing aliasing and baseband noise.

A closed-loop feedback network linearizes a filtering mixer, preserving I/Q modulator linearity and SNR under PVT variation.

Single-tone and reverse feedthrough calibration cuts mixer IIP2 test time and area while reducing IMD2 distortion in wireless receive chains.

A DC-controlled mixer and downstream circuit cut pulse radar current draw while preserving gain, long integration, and phase-noise robustness.

A feedback circuit regulates transformer-coupled buffer swing across PVT corners to curb power waste, gain variation, LO leakage, and reliability issues.

Using 25% and 75% LO duty cycles, this mixer suppresses third-order harmonics while reducing circuit complexity and power use.

A three-stage RF modulator uses current mirroring and a passive mixer to improve linearity while reducing mixer complexity, current draw, and die area.

A replica envelope bias circuit stabilizes RF mixer DC current against PVT variation and LO swing, improving gain, noise figure, and linearity.

A transformer links the transconductor and switching quad to share DC bias current, cutting mixer power use while preserving linearity.

A shared center-tap bias path lets a transformer-coupled RF mixer cut power use while maintaining linearity and mixer performance.

A shared DC bias path through transformer center taps lets the transconductor and switching quad run on one supply, reducing mixer power use.

An on-chip variable current source applies bias to distributed amplifier unit cells while preserving gain and reflection properties.

Replica envelope detection biasing stabilizes RF mixer DC current across PVT and LO swing changes, preserving gain, noise figure, and linearity.

Using an SP3T switch and image-reject filtering, this receiver blocks third-harmonic interference without pre-mixer band limiting.

Comb-signal mixing compresses RF calibration bandwidth into IF, avoiding segmented measurement errors while cutting power use and leakage.

A dual transistor-amplifier sequence corrects phase and amplitude errors in sinusoid signals without extra filter stages, saving area and power.

Symmetric switch placement with shared capacitors improves local oscillator noise handling in compact single-balanced mixers.

Graded emitter or source resistors equalize unit-cell currents in distributed amplifiers, improving gain and reflection across wideband frequencies.

A cascaded LO path feeds the TX mixer and RX buffer on shared lines, cutting splitter circuitry, routing crossover, and buffer power.

Passive mixer degeneration and gate-voltage calibration correct 90° phase error at high frequency while cutting area and power.

Phase-adjustable LO amplifiers in parallel mixer stages cancel stage errors and cut parasitic capacitance for wider bandwidth and better linearity.

A dual transistor sequence uses feedback to correct phase and amplitude imbalance in sinusoid signals without extra amplifier stages.

Mixed common-mode and differential-mode mixing generates higher harmonics in one stage, cutting mmWave multiplier area, power, and nearby spurs.

A close-loop filter and feedback path improve mixer linearity and SNR robustness under PVT variation in I/Q transmitter modulation.

Eight-phase mixing plus harmonic filtering suppresses higher order intermodulation and harmonics, improving wireless transceiver signal quality.

A push-pull split current conveyer with paired mixers handles desired and blocking RF signals without major gain loss, while saving power and die area.

A series-stacked RF mixer, attenuator, and matching network share one bias current to cut power dissipation and noise in cryogenic quantum links.

A dual local oscillator lets one satellite frequency converter serve multiple chains, cutting mass and volume while preserving cold redundancy.

Selective NMOS body-bias control improves millimeter-wave active mixer gain and noise figure without raising current or LO power.

Parallel band-specific amplifier paths split and recombine signals to curb full-duplex self-interference while improving noise and spectral efficiency.

Mixed common-mode and differential-mode mixing enables single-stage frequency multiplication with lower power, smaller footprint, and wider harmonic spacing.

A parallel negative capacitance circuit cancels drain-source parasitic capacitance, preserving off-impedance and conversion efficiency across wide bands.

By removing the drain bias circuit and setting transistor bias through the transmission line, this mixer keeps broadband gain with lower power use.

A shorter-than-quarter-wave source stub and tuned LO/RF matching reduce inductance loss and raise conversion gain at high frequencies.

A three-transistor mixer topology expands RF and IF bandwidth while lowering LO drive power and chip area for compact high-data-rate links.

Quarter-wave impedance isolation keeps RF and IF matching circuits from loading each other, improving conversion gain and packaged mixer stability.

Sample reordering and complex LO mixing suppress harmonic blockers and reject negative-frequency images without off-chip filters.

Parallel signal and image mixers use phase-arranged differential paths to reduce bandtilt and common-mode spurs in frequency conversion.

Feedback detects buffer output swing and tunes driver bias or regulated voltage to keep mmWave mixer drive stable across PVT corners.

By combining mixer and buffer functions in one circuit cell, this case cuts layout area, power use, and insertion loss during mode switching.

Parallel band-specific amplifier paths split and recombine signals to cut full-duplex self-interference and improve spectral efficiency.