Semiconductor Superlattice With Oxygen and Carbon Monolayers for Mobility

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Solution Overview

Problem

Despite existing advancements, further enhancements are desired to achieve improved performance in semiconductor devices using advanced semiconductor materials and processing techniques.

Innovation Solution

A method for making semiconductor devices involves forming a superlattice adjacent a semiconductor layer, with the superlattice comprising stacked groups of layers including base semiconductor monolayers and non-semiconductor monolayers, such as oxygen and carbon, to reduce effective mass and enhance charge carrier mobility.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional semiconductor materials and structures are used, then manufacturing processes are simpler, but charge carrier mobility is limited

Engineering Contradiction:
Improvecharge carrier mobilityVSAvoidsuperlattice structure complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The semiconductor layer is segmented into a superlattice structure with alternating monolayers of different materials (e.g., Si/SiGe, Si/SiC) to create periodic potential barriers that enhance charge carrier mobility through quantum confinement effects and reduced scattering

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Composite semiconductor materials are used in the superlattice structure, combining different semiconductor compounds (silicon, silicon-germanium, silicon-carbide) to achieve superior electrical properties that cannot be obtained with single materials

Inventive Principle:
Principle #40Composite materials

2Speed

If strained material layers are introduced to enhance mobility, then charge carrier mobility improves, but manufacturing precision requirements increase

Engineering Contradiction:
Improvecharge carrier mobilityVSAvoidlayer thickness control
Core Design Contradiction:
SpeedVSManufacturing precision

Solution Approach 1:

The lattice constant and strain state are controlled by adjusting the composition ratio of alloy materials (e.g., Ge content in SiGe, C content in SiC) and layer thickness, allowing optimization of strain-induced mobility enhancement while maintaining manufacturability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

Strain is localized to specific thin layers within the superlattice structure, with buffer layers and relaxation layers strategically placed to manage stress distribution and prevent defect propagation

Inventive Principle:
Principle #1Segmentation

3Reliability

If impurity-free zones are created to improve performance, then device performance improves, but manufacturing complexity increases

Engineering Contradiction:
Improvedevice performanceVSAvoidprocessing steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The superlattice structure is formed with inherently low-defect regions during the epitaxial growth process itself, creating impurity-free zones before subsequent processing steps, thereby reducing the need for additional complex processing to achieve clean regions

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The superlattice structure achieves higher charge carrier mobility and provides improved energy band structures, acting as a barrier to dopant diffusion and reducing scattering effects, which is advantageous for both electronic and opto-electronic devices.

Implementation Method 1

Electrons having a smaller effective mass, and which have been induced by an electric field applied to the gate electrode, are confined in the second silicon layer

Methodology Applied
Scientific EffectQuantum confinement: Potential Well

Implementation Method 2

The resulting biaxial strain in the upper silicon layer alters the carrier mobilities enabling higher speed and/or lower power devices

Methodology Applied
Scientific EffectStrain: Deformation

Implementation Method 3

a Si—Ge short period superlattice with higher mobility achieved by reducing alloy scattering in the superlattice

Methodology Applied
Scientific EffectAlloy scattering reduction: Scattering

Data Source

PatentUS11848356B2Method for making semiconductor device including superlattice with oxygen and carbon monolayers
Publication Date: 2023.12.19 ATOMERA INC
  • US11848356B2 patent drawing
  • US11848356B2 patent drawing
  • US11848356B2 patent drawing

AI summary

A method for making a semiconductor device may include forming a superlattice adjacent a semiconductor layer. The superlattice may include a plurality of stacked groups of layers, with each group of layers including a plurality of stacked base semiconductor monolayers defining a base semiconductor portion, and at least one non-semiconductor monolayer constrained within a crystal lattice of adjacent base semiconductor portions. The at least one non-semiconductor monolayer in a first group of layers of the superlattice may comprise oxygen and be devoid of carbon, and the at least one non-semiconductor monolayer in a second group of layers of the superlattice may comprise carbon.