Surface Electrode Flattening in Gate-Structured Semiconductor Fabrication
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Solution Overview
Problem
Existing methods for manufacturing semiconductor devices with gate structures face challenges in achieving surface electrode flatness while minimizing the number of processing steps, particularly due to the need for thick interlayer insulating films and repeated film forming, reflow, and etching steps, as well as the complexity of plug structures.
Innovation Solution
The method involves discretely forming gate structures and interlayer films on a semiconductor substrate, followed by sputtering to create a surface electrode that is either thicker or thinner than the interlayer films, and then using dry etching and plating to flatten the surface, thereby eliminating the need for additional steps like forming a tungsten plug and barrier metal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a plug structure with tungsten electrode is used to eliminate steps, then the flatness of the surface electrode is improved, but the number of manufacturing steps increases due to additional barrier metal and tungsten plug formation
Solution Approach 1:
The invention extracts and eliminates the unnecessary plug structure (barrier metal and tungsten plug) from the conventional manufacturing process. By directly forming the surface electrode on the gate structure without intermediate plug layers, the patent removes complex steps while maintaining surface flatness through direct electrode deposition and selective etching methods
Solution Approach 2:
Instead of building up layers to reach the desired height (conventional plug approach), the invention inverts the approach by forming the surface electrode to extend beyond the gate structure and then selectively removing excess portions. This top-down approach simplifies the process by avoiding multiple deposition steps for barrier metals and plugs
2Device complexity
If the opening portion of the interlayer insulating film reaches directly above the trench gate, then the structure is simplified, but strict control of the taper angle is required and the interlayer insulating film must be thickened
Solution Approach 1:
The invention performs preliminary actions by forming the surface electrode material to extend beyond the gate structure boundaries before any etching occurs. This preliminary over-extension allows subsequent selective removal to achieve the desired shape without requiring precise control during the deposition phase, thereby eliminating the need for strict taper angle control
Solution Approach 2:
The surface electrode is segmented into two functional portions: a first portion that contacts the gate structure and a second portion that extends beyond it. This segmentation allows independent treatment of each portion, with the second portion being selectively removed to achieve the final configuration without affecting the structural integrity of the gate contact
3Manufacturing precision
If film forming, reflow, and etching steps are repeated multiple times to eliminate steps on the surface electrode, then the surface flatness is improved, but the number of manufacturing steps increases
Solution Approach 1:
The invention merges multiple separate steps (film forming, reflow, and etching) into a simplified sequence. By forming the surface electrode in a single deposition step and using selective etching to remove excess material, the patent combines what would otherwise require repeated cycles into one efficient process flow, thereby improving manufacturing efficiency while maintaining surface flatness
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for surface electrode flattening with a reduced number of steps, achieving flatness without the necessity of a plug structure and minimizing step height, thus improving semiconductor device reliability and efficiency.
Implementation Method 1
forming a first surface electrode being thicker than a plurality of gate interlayer films on the first main surface of the semiconductor substrate between the plurality of the gate interlayer films and on the plurality of the gate interlayer films by sputtering
Implementation Method 2
removing convex portions of concave portions and the convex portions on the first surface electrode generated due to steps between the gate interlayer films and the first main surface of the semiconductor substrate by dry etching
Implementation Method 3
forming a second surface electrode on an upper surface of the first surface electrode by plating treatment
Data Source
AI summary
An object of the present invention is to improve the flatness of a surface electrode without increasing the number of steps in a semiconductor device having gate structures. A method of manufacturing a semiconductor device of the present invention includes the steps of discretely forming a plurality of gate structures on a first main surface of the semiconductor substrate, discretely forming a plurality of gate interlayer films covering the plurality of gate structures of the semiconductor substrate, forming a first surface electrode being thicker than the gate interlayer films on the first main surface of the semiconductor substrate between the plurality of the gate interlayer films and on the plurality of the gate interlayer films by sputtering, and removing convex portions of concave portions and the convex portions on the first surface electrode by dry etching using photolithography, to flatten an upper surface of the first surface electrode.