Suspended Membrane Dual-Gate MOS Transistor Fabrication
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Solution Overview
Problem
The existing methods for manufacturing MOS transistors on SOI substrates are costly due to the high cost of the substrate, and they face issues with selective etching of sacrificial layers, which can damage metal gates and have imperfect selectivity over spacers and gate insulators.
Innovation Solution
A method is developed to form a suspended membrane in a single-crystal semiconductor substrate using an insulating ring, where a sacrificial layer is etched to create a membrane anchored in the ring, and a resin layer is irradiated to form trenches for dual-gate transistor formation, with gate conductors deposited in these trenches, avoiding the etching issues of the sacrificial layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a sacrificial layer is etched to form a suspended membrane, then the membrane structure is created, but the metal gate is damaged and selectivity over spacers and gate insulators is imperfect
Solution Approach 1:
The method performs the etching of the sacrificial layer before forming the metal gate structure. By removing the sacrificial layer in advance, the subsequent metal gate deposition and transistor formation steps are not exposed to etching processes that would cause damage or selectivity issues.
Solution Approach 2:
The manufacturing process is divided into distinct sequential stages: first forming the suspended membrane structure by etching the sacrificial layer, then separately forming the gate structure. This segmentation allows each component to be optimized independently without interference from etching processes.
2Reliability
If an SOI substrate is used to form MOS transistors, then the transistor performance is improved, but the manufacturing cost increases significantly
Solution Approach 1:
The invention extracts and removes the expensive SOI substrate requirement by forming suspended membranes directly in bulk semiconductor substrates. The active transistor regions are isolated and suspended without requiring the entire wafer to be an expensive SOI substrate, thereby reducing material costs while maintaining device performance.
Solution Approach 2:
The method uses standard bulk semiconductor substrates instead of expensive SOI substrates, accepting that the substrate material in the active region will be removed to form the suspended structure. This approach uses cheaper, more readily available substrate materials to achieve the same functional result.
3Manufacturing precision
If the etching depth is increased to access the sacrificial layer, then the membrane structure is formed, but the mechanical resistance of the membrane is compromised
Solution Approach 1:
The sacrificial layer is removed before forming the final membrane structure. This preliminary removal allows precise control of the etch depth to exactly the required level, and subsequent steps can then build upon this precisely defined surface without risking over-etching that would compromise mechanical strength.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method simplifies the manufacturing process, reduces costs by avoiding substrate-related expenses, and ensures the formation of a dual-gate MOS transistor with self-aligned gates, maintaining the mechanical resistance of the membrane while preventing damage to transistor elements during etching.
Implementation Method 1
irradiating the resin layer with an electron beam or with extreme ultraviolet radiations
Implementation Method 2
irradiating the resin layer with an electron beam or with extreme ultraviolet radiations
Implementation Method 3
The selective etching of sacrificial layer 6 over layer 8 is performed after the forming of gate 10-14
Implementation Method 4
successive epitaxial forming of a silicon-germanium sacrificial layer 6 and of a silicon layer 8
Data Source
AI summary
A method for manufacturing a suspended membrane in a single-crystal semiconductor substrate, including the steps of: forming in the substrate an insulating ring delimiting an active area, removing material from the active area, successively forming in the active area a first and a second layers, the second layer being a single-crystal semiconductor layer, etching a portion of the internal periphery of said ring down to a depth greater than the thickness of the second layer, removing the first layer so that the second layer formed a suspended membrane anchored in the insulating ring.