Series-Parallel Switch Bar Power Module With Dual-Sided Cooling
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Solution Overview
Problem
Existing semiconductor power modules face challenges in achieving high-voltage and high-current ratings with reduced parasitic inductance, effective partial discharge mitigation, and efficient thermal management, particularly in parallel-series die configurations, which are critical for medium-voltage grid applications.
Innovation Solution
A dual-orthogonal-cooling (DOC) packaging concept that positions SiC dies perpendicularly to the substrate using switch bars, confining power loops and segmenting voltage stresses to reduce electric field intensity, while enabling dual-sided heat dissipation through stacked substrates and external decoupling capacitors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If multiple parallel dies are used per switch position to achieve high current ratings, then current capacity is improved, but parasitic inductance increases
Solution Approach 1:
The patent transitions from planar arrangement of parallel dies to a three-dimensional stacked configuration using multiple substrates. Switches are arranged in series across different substrate layers, with each substrate carrying fewer switches. This vertical stacking reduces the area of current loops and minimizes parasitic inductance while maintaining high current capacity through parallel connection of multiple such stacks.
Solution Approach 2:
The patent divides the high-voltage switch into multiple lower-voltage switch segments connected in series across different substrate layers. Each substrate carries a portion of the total voltage stress, allowing parallel dies to be distributed across multiple series-connected segments. This segmentation reduces the parasitic inductance of individual parallel die groups while achieving the required current rating through parallel connection of segments.
2Power
If series-connected dies are used to achieve high voltage ratings, then voltage capacity is improved, but device complexity increases
Solution Approach 1:
The patent uses vertical stacking of multiple substrates in the third dimension to achieve series connection of dies. Each substrate layer contains switches connected in series with those on adjacent layers, creating a three-dimensional series-parallel configuration. This approach manages voltage rating through vertical arrangement while keeping individual substrate structures relatively simple and modular.
Solution Approach 2:
The patent designs each substrate with a standardized structure that can serve multiple functions: electrical isolation between voltage potentials, mechanical support for dies, thermal management interface, and electrical connection point for series-parallel configuration. This universal substrate design simplifies the overall module structure despite the complex series-parallel die arrangement.
3Object-generated harmful factors
If in-package MLCC decoupling capacitors are used to reduce parasitic inductance, then Ls is improved, but short-circuit ruggedness deteriorates
Solution Approach 1:
The patent extracts the decoupling capacitors from the internal package structure and places them externally on the PCB. This external placement eliminates the reliability concerns associated with internal MLCC capacitors during short-circuit events, as external capacitors are not subjected to the same thermal and mechanical stresses. The external capacitors still achieve the goal of reducing parasitic inductance in the power loop.
4Temperature
If dual-sided cooling is implemented to improve thermal management, then heat dissipation is improved, but manufacturing complexity increases
Solution Approach 1:
The patent implements dual-sided cooling by utilizing both top and bottom surfaces of the substrate stack for heat dissipation. Each substrate layer provides thermal pathways to both upper and lower heat sinks, creating a three-dimensional thermal management structure. This approach improves heat dissipation efficiency while maintaining relatively simple manufacturing through standardized substrate and heat sink components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The DOC packaging design achieves reduced package footprint, scalable power ratings, minimized parasitic inductance, and enhanced thermal performance, addressing the limitations of conventional designs by improving heat management and reliability in high-power modules.
Implementation Method 1
The switch devices of the same switch bar are electrically connected in parallel and respective switch devices of different switch bars are electrically connected in series
Implementation Method 2
enabling dual-sided heat dissipation through stacked substrates
Data Source
AI summary
The present disclosure provides a semiconductor power module. The semiconductor power module includes a first substrate, a second substrate, and a plurality of switch bars stacked and laterally positioned between the first substrate and the second substrate. Each switch bar includes a plurality of dies disposed in parallel, each die of the plurality of dies comprising a switch device with a source, a drain, and a gate, a gate driver printed circuit board (PCB) connected to the gates of the switch devices in the plurality of dies, and interconnects configured to connect the sources and drains of the switch devices in the plurality of dies. The switch devices of the same switch bar are electrically connected in parallel and respective switch devices of different switch bars are electrically connected in series.


