Power Semiconductor Switch Timing Detection via Series Inductance
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Solution Overview
Problem
Existing methods for controlling power semiconductor switches in inverters and frequency converters face challenges in achieving concurrent switching events due to physical differences between parallel-connected switches, leading to additional losses and increased costs, particularly due to the need for high-speed measurement components and multiple isolation channels.
Innovation Solution
A method that monitors the rate of change of current in power semiconductor switches by measuring voltage differences across an inductance in series with the switch, using a single comparator to detect both turn-on and turn-off events, thereby reducing the component count and cost by utilizing a single isolation component and minimizing delay skew.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If voltage across bonding wire is used for detecting switching events, then switching event detection is enabled, but very high speed measurement components are required which increase cost
Solution Approach 1:
The patent introduces an inductance as an intermediary element in series with the power semiconductor switch. The inductance converts the fast current switching events into voltage changes across its terminals that are slower and easier to measure. The measurement circuitry measures voltage across the inductance terminals rather than directly measuring the fast current changes, thereby detecting switching events without requiring very high speed measurement components.
2Reliability
If multiple isolation channels are used for control and feedback signals, then isolation requirements are met, but cost-effectiveness is reduced
Solution Approach 1:
The patent combines the control signal path and feedback signal path to share a single isolation channel. The measurement circuitry detects switching events and generates feedback signals that are combined with the control signals, allowing both control and feedback to traverse the same isolation barrier. This reduces the number of isolation channels required from multiple to just one, improving cost-effectiveness while maintaining galvanic isolation.
3Power
If parallel-connected power semiconductor switches are used for higher power ratings, then power capacity is increased, but non-concurrent switching events cause additional losses
Solution Approach 1:
The patent implements feedback by measuring voltage across the inductance terminals to detect switching events. This feedback information about actual switching timing is used to adjust and synchronize the switching of parallel-connected power semiconductor switches. By monitoring the switching events of individual switches and comparing their timing, the system can adjust control signals to achieve concurrent switching, thereby reducing switching losses while maintaining high power capacity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for accurate detection and adjustment of switching events with minimal additional cost on gate control circuitry, reducing component count, circuit board area, and cost, while minimizing delay variations and propagation delays.
Implementation Method 1
A voltage difference between the two ends of the inductance represents the rate of change of the current through the inductance
Data Source
Figure 1~2b
Figure 3~4
AI summary
The present disclosure describes an arrangement (and a method) for a power semiconductor switch Q1. In the switch, a first current between a first electrode (e) and a second electrode (c) is configured to be controlled on the basis of a control voltage between a third electrode (g) and the first electrode (e). The arrangement comprises an inductance L1 connected in series with the power semiconductor switch, wherein a first end of the inductance is connected to the first electrode (e), first measuring means 11 for generating a first measurement voltage vm,1 on the basis of the first end's voltage with respect to a reference potential, second measuring means 12 for generating a second measurement voltage vm,2 on the basis of the inductance's second end voltage with respect to the reference potential, a comparator 13 for comparing the first measurement voltage with the second measurement voltage, and driver means for generating the control voltage, the driver means being configured to generate a first control voltage level and a second voltage level of the control voltage.