Switched-Capacitor Reset Phasing for Glitch and ISI Reduction
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Solution Overview
Problem
Double-sampled reference DACs in ADCs face issues with residual charge kickback, causing quantization noise and tone propagation, especially when sharing a reference voltage among multiple ADCs, leading to inter-symbol interference and data-dependent glitches.
Innovation Solution
A system with a sampling capacitor and switch network that includes first and second sampling switches, activated during respective phases of a sampling cycle, and reset switches to reset the capacitor to a data-independent and/or signal-independent charge during a reset phase, minimizing residual charge and inter-symbol interference.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a double-sampled reference DAC is used to maximize reference charge to the integrator, then the reference voltage sampling efficiency is improved, but residual charge kickback occurs causing quantization noise and tone propagation
Solution Approach 1:
The patent applies preliminary action by resetting the sampling capacitor to a data-independent charge state during a dedicated reset phase before the actual sampling operation. This preliminary reset action prevents residual charge from previous operations from affecting subsequent sampling, thereby eliminating kickback while maintaining double-sampling efficiency
Solution Approach 2:
The sampling cycle is segmented into distinct phases: a reset phase where the capacitor is charged to a data-independent voltage, and sampling phases where actual signal acquisition occurs. This segmentation isolates the harmful residual charge effect into a controlled reset phase that can be properly managed
2Adaptability or versatility
If the same reference voltage is shared among multiple ADCs, then resource utilization is improved, but inter-symbol interference and tone propagation occur between ADCs
Solution Approach 1:
By performing a preliminary reset of the sampling capacitor to a data-independent charge state before sampling operations, the patent ensures that each ADC starts from a known clean state. This preliminary action prevents interference between multiple ADCs sharing the same reference voltage
Solution Approach 2:
The reset phase acts as an intermediary between sampling operations of different ADCs. During this intermediate phase, the sampling capacitor is reset to a data-independent state, mediating between previous and next sampling operations to prevent interference propagation
3Measurement precision
If double-sampling is performed to maximize reference charge, then conversion accuracy is improved, but data-dependent glitches and quantization noise are introduced
Solution Approach 1:
The patent segments the sampling process into a reset phase (charging to data-independent voltage) and sampling phases (acquiring signal data). This segmentation separates data-independent operations from data-dependent operations, preventing data-dependent glitches while maintaining conversion accuracy
Solution Approach 2:
The patent extracts the data-independent charge component during the reset phase, separating it from the data-dependent signal component. By taking out the data-independent portion first, the subsequent sampling operations only handle the relevant signal data without introducing data-dependent glitches
Data Source
AI summary
A system may include a sampling capacitor and a switch network. The switch network may include one or more first sampling switches electrically coupled to the sampling capacitor and configured to be activated during a first phase of a sampling cycle of the system and one or more second sampling switches electrically coupled to the sampling capacitor and configured to be activated during a second phase of the sampling cycle, wherein the switch network is configured to reset the sampling capacitor to a data-independent and/or signal-independent charge during a reset phase of the sampling cycle.