Switched-Capacitor Power Conversion With Drain-Gate Voltage Clamping
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Solution Overview
Problem
Conventional power conversion circuits using LDMOS transistors to withstand high voltages result in increased ON resistance and manufacturing costs due to the use of high voltage devices, leading to reduced efficiency and charging inefficiencies.
Innovation Solution
A power conversion circuit with a clamp circuit that clamps drain-gate voltages of switches to prevent exceeding breakdown voltages, using sub-clamp circuits and a bias voltage switching circuit to manage high voltages, allowing the use of low voltage devices for all switches.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If LDMOS transistor is adopted to withstand high voltage, then voltage tolerance is improved, but ON resistance increases leading to increased ON power loss
Solution Approach 1:
The patent introduces a clamp circuit as an intermediary component that actively manages the voltage across switches. This clamp circuit includes voltage detection units and control switches that work together to limit the drain-gate voltage to a safe level, allowing the use of lower voltage rated switches without direct exposure to high bus voltage, thereby reducing ON resistance and power loss while maintaining system reliability
Solution Approach 2:
The patent dynamically changes the operating parameters of the switches by controlling their drain-gate voltage through the clamp circuit. By adjusting the gate voltage based on detected drain-gate voltage levels, the system maintains the drain-gate voltage within a safe range, enabling the use of switches with lower breakdown voltages and thus lower ON resistance, while still withstanding the high bus voltage through active parameter control
2Reliability
If LDMOS transistor with high breakdown voltage is used, then voltage tolerance is improved, but manufacturing cost increases
Solution Approach 1:
The clamp circuit serves as a protective intermediary that isolates the switches from direct high voltage stress. By introducing this control mechanism, the system can use cheaper, lower voltage rated switches instead of expensive high voltage LDMOS transistors, reducing manufacturing costs while maintaining the ability to withstand high bus voltage through active voltage clamping
Solution Approach 2:
The patent employs cheaper switches with lower breakdown voltage ratings instead of expensive high voltage LDMOS transistors. These cheaper switches are protected by the clamp circuit, which actively prevents them from being exposed to damaging high voltage levels, thereby reducing component costs while maintaining system reliability through the added control mechanism
3Power
If switch drain-gate voltage is allowed to reach maximum rating, then voltage utilization is improved, but switch breakdown risk increases
Solution Approach 1:
The clamp circuit implements a feedback mechanism where voltage detection units continuously monitor the drain-gate voltage of switches. When the detected voltage approaches the predetermined safe level, the control circuit activates the clamp switch to limit further voltage increase. This feedback control ensures the drain-gate voltage remains within safe limits, preventing breakdown while maintaining high voltage utilization through active management
Solution Approach 2:
The clamp circuit performs preliminary protective action by preemptively limiting the drain-gate voltage before it can reach dangerous levels. The voltage detection and clamping mechanism acts in advance to prevent overvoltage conditions, ensuring switches operate within their safe voltage ratings and eliminating breakdown risk while still allowing high voltage operation through the controlled clamping action
Data Source
AI summary
A power conversion circuit converting power between a bus voltage at a bus node and a first voltage at a first node includes: a bus switch coupled between the bus node and a second node which has a second voltage; plural conversion switches coupled, with at least one conversion capacitor, to the first node and the second node. In a power conversion mode, the plural conversion switches convert a power between the second voltage and the first voltage via a switched capacitor power conversion method, and plural sub-clamp circuits respectively clamping a drain-gate voltage of respective switch of a group of switches to not exceed a drain-gate clamp voltage, so that when the bus node is applied with a bus maximum rating voltage, respective drain-source voltages of the bus switch and the respective switch in the respective corresponding plural conversion switches are smaller than a corresponding breakdown voltage.