Switching Device Peripheral Gate Insulation for Voltage Stress
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Solution Overview
Problem
The existing switching devices face limitations in withstanding voltage due to high electric fields applied to the gate insulating layers in the peripheral region of the device, leading to potential channel generation and increased on-resistance.
Innovation Solution
The switching device incorporates gate insulating layers with a thicker second thickness and higher dielectric constant in the peripheral portion compared to the center portion, alleviating the electric field and maintaining similar gate threshold and on-resistance values across the device region.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate insulating layers in the peripheral portion have the same thickness and dielectric constant as in the center portion, then the device structure is simple and manufacturing is easy, but the withstanding voltage is limited due to high electric field application in the peripheral region
Solution Approach 1:
The patent applies different gate insulating layer configurations to different regions: the peripheral portion has a thicker gate insulating layer with higher dielectric constant compared to the center portion. This local differentiation allows the peripheral region to withstand higher electric fields while maintaining uniform device characteristics across the structure.
Solution Approach 2:
The patent changes the physical parameters of the gate insulating layer in the peripheral portion by increasing both the thickness and the dielectric constant. This parameter modification enables the peripheral region to handle higher electric fields without breakdown, thereby improving the overall withstanding voltage of the device.
2Reliability
If the gate insulating layers in the peripheral portion are made thicker with higher dielectric constant, then the withstanding voltage is improved, but the gate threshold and on-resistance may increase
Solution Approach 1:
The thicker gate insulating layer with higher dielectric constant is applied selectively only to the peripheral portion, not the entire device. This localized approach improves withstanding voltage where electric field stress is highest while minimizing the impact on gate threshold and on-resistance in the active center region.
Solution Approach 2:
The patent carefully selects the thickness and dielectric constant parameters for the peripheral gate insulating layer to achieve the right balance. By optimizing these parameters, the design improves withstanding voltage while keeping the increase in gate threshold and on-resistance within acceptable limits.
3Ease of manufacture
If uniform gate insulating layers are used across the device region, then the manufacturing process is simplified, but electric field accumulation occurs in the peripheral region leading to channel generation
Solution Approach 1:
The patent implements a differentiated gate insulating layer structure where the peripheral portion has distinct properties (thicker and higher dielectric constant) compared to the center portion. This local quality differentiation addresses the electric field accumulation problem in peripheral regions while maintaining manufacturability through standardized fabrication processes.
Solution Approach 2:
The gate insulating layer structure uses composite construction with different materials or material configurations in different regions. The peripheral portion employs a gate insulating layer with higher dielectric constant and greater thickness, creating a composite structure that optimizes electric field distribution across the device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the withstanding voltage of the switching device while suppressing increases in threshold and on-resistance, ensuring even current flow and reduced electric field accumulation in the peripheral region.
Implementation Method 1
the gate insulating layers in the peripheral portion have, within at least a part of the outer peripheral portion, a second thickness thicker than the first thickness and a second dielectric constant greater than the first dielectric constant... an electric field applied to the gate insulating layers is alleviated in the peripheral portion of the device region
Data Source
AI summary
A switching device may include a semiconductor substrate; gate trenches; bottom insulating layers covering bottom surfaces of the gate trenches; gate insulating layers covering side surfaces of the gate trenches; and gate electrodes arranged in the gate trenches. The gate insulating layers in a center portion may have a first thickness and a first dielectric constant, and one or more of the gate insulating layers in a peripheral portion may have, within at least a part of the peripheral portion, a second thickness thicker than the first thickness and a second dielectric constant greater than the first dielectric constant. The semiconductor substrate may include a first region being in contact with the gate insulating layers, a body region being in contact with the gate insulating layers under the first region, and a second region being in contact with the gate insulating layers under the body region.