Synapse-Mimetic Device for Hardware Neural Network Training
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Solution Overview
Problem
Current computing architectures face limitations in chip performance and power consumption due to data bottlenecks, and existing neural network hardware implementations struggle with achieving software-level training accuracy and energy efficiency for deep neural networks, especially in IoT devices.
Innovation Solution
A synapse-mimetic device with a capacitor and transistors that implement symmetric and linear training characteristics, allowing for on-chip learning and reducing energy consumption and training time, using amorphous InGaZnO field effect transistors or metal oxide transistors for efficient neural network training.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If existing analog memory devices are used for neural network training, then energy efficiency is improved, but training accuracy falls short of software-level performance
Solution Approach 1:
The patent changes the operational parameters of the synapse-mimetic device by applying multiple voltage levels (first voltage for potentiation, second voltage for depression) to control the capacitor charge states. This enables precise control of weight updates with 2 or more conduction levels, achieving both energy efficiency and software-level training accuracy simultaneously.
Solution Approach 2:
The patent replaces the resistance-change mechanism of traditional analog memory devices with a capacitor-based charge storage mechanism controlled by transistors. This substitution enables precise voltage control and symmetric linear training characteristics while maintaining the energy efficiency advantages of analog computing.
2Use of energy by moving object
If resistance change memory or phase change memory is used to achieve multiple conduction levels, then energy efficiency is improved, but symmetrical and linear conductivity characteristics are compromised
Solution Approach 1:
The patent substitutes the resistance-change mechanism with a capacitor-based voltage storage mechanism. The capacitor charge states (0, first voltage, second voltage) provide precise, symmetric, and linear weight updates in both potentiation and depression operations, eliminating the non-ideal characteristics of resistance change and phase change memories.
Solution Approach 2:
The patent uses voltage level changes (first voltage for potentiation, second voltage for depression) to achieve symmetric and linear conductivity characteristics. The voltage-based approach ensures that weight updates are symmetric and linear, overcoming the limitations of resistance and phase change mechanisms.
3Device complexity
If non-volatile memory devices are used for inference only, then device simplicity is maintained, but training capability is lost
Solution Approach 1:
The patent designs the synapse-mimetic device to perform both training and inference functions. The same capacitor and transistor structure supports weight storage during inference while enabling weight updates during training through controlled voltage applications, achieving multi-functionality without significant complexity increase.
Solution Approach 2:
The patent introduces dynamic voltage control capabilities to the previously static non-volatile memory structure. By applying first voltage for potentiation and second voltage for depression, the device transitions from read-only inference to writable training-capable functionality, enabling adaptive neural network optimization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables hardware-based neural network training with software-level accuracy, reducing energy consumption and training time while facilitating three-dimensional integration for reduced circuit area.
Implementation Method 1
a capacitor; a first transistor which connects a first power supply to a first end of the capacitor
Implementation Method 2
a first transistor which connects a first power supply to a first end of the capacitor in response to a first control signal
Implementation Method 3
a fifth transistor which provides, to an output line, a current determined by the voltage of the first end of the capacitor
Data Source
AI summary
A synapse-mimetic device includes: a capacitor; a first transistor which connects a first power supply to a first end of the capacitor in response to a first control signal; a second transistor which connects a second power supply to a second end of the capacitor in response to a second control signal; a third transistor which connects the first power supply to the second end of the capacitor in response to a third control signal; a fourth transistor which connects the second power supply to the first end of the capacitor in response to a fourth control signal; and a fifth transistor which provides, to an output line, a current determined by the voltage of the first end of the capacitor, the voltage of the input line, and the voltage of the output line.


