Synchronous SPI-to-I2C Conversion Without Buffering Delays
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Solution Overview
Problem
Existing systems for converting data between different serial protocols, such as SPI and I2C, introduce delays due to buffering, which is inefficient and affects communication speed.
Innovation Solution
A custom integrated circuit with logic to sequence and mirror clock and data signals between SPI and I2C protocols, allowing synchronous and real-time data transmission without buffering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is buffered during protocol conversion, then data can be properly transmitted between different serial protocols, but communication delays are introduced
Solution Approach 1:
The patent extracts the buffering function from the protocol converter and implements it within the SPI and I2C controllers themselves. The SPI controller includes an input buffer for receiving SPI data and an output buffer for transmitting SPI data, while the I2C controller includes similar buffers. This allows the protocol converter to directly transfer data between these buffers without introducing additional buffering delays, while still ensuring reliable protocol conversion.
Solution Approach 2:
The protocol converter acts as an intermediary between the SPI and I2C controllers, establishing direct buffer-to-buffer communication channels. The converter includes an SPI data input buffer connected to an I2C data output buffer, and an I2C data input buffer connected to an SPI data output buffer, enabling direct data transfer without additional buffering stages.
2Adaptability or versatility
If a gateway device is used to convert between serial protocols, then devices using different protocols can communicate, but the system complexity increases
Solution Approach 1:
The patent merges the protocol conversion functionality directly into the existing SPI and I2C controller structures. The protocol converter is integrated with these controllers, sharing buffer resources and control logic, which reduces overall system complexity compared to a separate gateway device while maintaining protocol compatibility.
Solution Approach 2:
The protocol converter is designed to handle bidirectional data transfer between SPI and I2C protocols, serving multiple functions within a single integrated component. It can convert SPI to I2C and I2C to SPI, and includes both input and output buffering capabilities, reducing the need for multiple separate conversion devices.
Data Source
AI summary
A logic circuit for converting serial data includes three SPI protocol inputs, including a chip select signal, an input clock signal, and an input data signal. The logic circuit also includes two I2C protocol outputs, including an output clock signal and an output data signal. The logic circuit detects the chip select signal transitioning to a logical zero state and initializes the output clock signal and the output data signal for data transmission. The input clock signal is mirrored to the output clock signal as the input clock signal is received at the second input, and the input data signal is transferred to the output data signal as the input data signal is received at the third input. The chip select signal is detected transitioning to a logical one state, and the output clock signal and the output data signal are reset indicating data transmission is complete.