T-Shaped Stacked Nanosheet Transistor for Higher Drive Current
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
As semiconductor devices scale down, the drive current in nanowire transistors reaches a limit due to reduced channel width, limiting further density and efficiency improvements.
Innovation Solution
The implementation of T-shaped stacked nanosheet transistors with recessed second semiconductor layers provides additional conductive area by forming a T-shaped profile, allowing for effective control of nanosheet channels without being limited by channel width or length, achieved through alternating semiconductor layers with varying Ge atomic percentages and ion implantation to control etch rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If nanowire transistors are used to improve carrier mobility and drive current, then device performance is improved, but channel width reduction limits drive current as device size decreases
Solution Approach 1:
The patent transitions from conventional planar or simple nanowire channels to three-dimensional stacked nanosheet channels arranged vertically. This dimensional change allows multiple channel sheets to be stacked one above another, effectively increasing the total channel width without increasing the lateral footprint, thereby maintaining drive current despite continued scaling of individual channel dimensions.
Solution Approach 2:
The channel is segmented into multiple discrete nanosheet layers stacked vertically, with each nanosheet forming a separate conductive path. These segmented channels are separated by dielectric layers and controlled by independent gate structures, allowing each segment to contribute to the overall drive current while maintaining compact lateral dimensions.
2Productivity
If device size is reduced to increase device density, then productivity and manufacturing efficiency are improved, but drive current reaches a limit
Solution Approach 1:
By stacking nanosheet channels in the vertical dimension rather than expanding laterally, the patent achieves increased effective channel width and drive current capability within a reduced lateral footprint. This vertical stacking enables higher device density while maintaining or improving drive current performance.
Solution Approach 2:
Multiple nanosheet channels are nested vertically within a compact structure, with each channel layer containing conductive material surrounded by dielectric layers. This nested arrangement allows multiple functional channels to occupy a small lateral space, achieving high device density without sacrificing drive current.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration increases drive current and enables finer control over threshold voltage, enhancing device performance while being scalable and integratable with existing manufacturing processes.
Implementation Method 1
ion implantation to control etch rates
Data Source
AI summary
Embodiments of the present disclosure provide a semiconductor device structure including a first channel layer formed of a first material, wherein the first channel layer has a first width, a second channel layer formed of a second material different from the first material, wherein the second channel layer has a second width less than the first width, and the second channel layer is in contact with a first surface of the first channel layer. The structure also includes a third channel layer formed of the second material, wherein the third channel layer has a third width less than the second width, and the third channel layer is in contact with a second surface of the first channel layer. The structure also includes a gate dielectric layer conformally disposed on the first channel layer, the second channel layer, and the third channel layer, and a gate electrode layer disposed on the gate dielectric layer.