Tandem Vertical FETs for Bidirectional Switching
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Solution Overview
Problem
Conventional back-to-back FET configurations in integrated circuits require significant dead space and substrate thickness, leading to high source-to-source resistance and fragility, limiting the efficiency and yield of bi-directional switching devices.
Innovation Solution
Forming FETs in tandem on a common substrate with reduced vertical separation and eliminating the need for guard rings, allowing for compact design and reduced substrate thickness, thereby minimizing source-to-source resistance and enhancing manufacturing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If FETs are arranged in conventional back-to-back configuration, then current control in both directions is achieved, but significant dead space and substrate thickness are required leading to high source-to-source resistance
Solution Approach 1:
The patent merges two FETs into a single integrated structure where they share common substrate regions and fabrication processes. This consolidation eliminates the dead space between separate FET devices while maintaining the back-to-back configuration functionality, directly reducing source-to-source resistance without requiring additional chip area.
Solution Approach 2:
The invention transitions from a lateral arrangement of FETs to a vertical stacking configuration where FETs are arranged in tandem on the substrate. This dimensional change allows overlapping of FET structures in the vertical dimension, eliminating horizontal dead space and reducing the overall footprint while maintaining electrical isolation through the substrate.
2Ease of manufacture
If conventional back-to-back FET configuration is used, then bi-directional switching is achieved, but guard rings and thicker substrates are required leading to fragility and reduced manufacturing efficiency
Solution Approach 1:
The patent extracts and eliminates the need for guard rings from the conventional FET structure. By redesigning the substrate interface and utilizing the shared substrate configuration, the invention removes these additional protective structures that contribute to substrate thickness and fragility, simplifying the manufacturing process and reducing mechanical stress on the device.
Solution Approach 2:
The invention changes the substrate thickness parameter by eliminating the requirements for guard rings and additional isolation structures. This parameter reduction directly improves substrate strength and reduces fragility while maintaining the necessary electrical isolation between FETs through optimized substrate doping and geometry.
3Reliability
If FETs are formed with adequate separation, then device isolation is achieved, but chip area utilization decreases and source-to-source resistance increases
Solution Approach 1:
The patent utilizes the vertical dimension by stacking FETs in tandem configuration on the substrate. This allows FETs to be separated in the vertical direction through the substrate thickness while occupying minimal horizontal chip area. The substrate acts as the isolation medium in the vertical dimension, enabling high chip area utilization while maintaining adequate device isolation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The tandem FET configuration reduces source-to-source resistance by half, increases chip area utilization, and eliminates the need for back-grinding, resulting in a more robust and efficient bi-directional switch design.
Implementation Method 1
When a voltage is applied to the gate, the resulting electric field generated penetrates through the oxide and creates an 'inversion layer' or 'channel' at the semiconductor-insulator interface
Implementation Method 2
In the ACCUFET a thin channel region (accumulation-layer) in the semiconductor near the gate accumulates when it is in the ON mode. In the OFF mode, the channel is depleted by the work function between the gate and the semiconductor
Data Source
AI summary
A bi-directional semiconductor switching device is formed by forming first and second vertical field effect transistors (FETs) formed in tandem from a semiconductor substrate. A source for the first FET is on a first side of the substrate and a source for the second FET is on a second side of the substrate opposite the first side. Gates for both the first and second. FETs are disposed in tandem in a common set of trenches formed a drift region of the semiconductor substrate that is sandwiched between the sources for the first and second FETs. The drift layer acts as a common drain for both the first FET and second FET.