Tapered Micro Bump Substrate Structure for Fine-Pitch Reliability

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional semiconductor packages face reliability issues due to bridge connections between fine-pitch bumps, which hinder miniaturization and increase the risk of electrical shorts.

Innovation Solution

A substrate structure with tapered micro bumps is developed, featuring recessions in passivation openings filled with insulating and conductive layers, allowing for increased bump density and reduced pitch, thereby preventing bridge connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If fine-pitch bumps are used to meet miniaturization requirements, then the semiconductor package size is reduced, but bridge connection between bumps occurs which lowers reliability

Engineering Contradiction:
Improvesemiconductor package sizeVSAvoidpackage reliability
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

The patent introduces a tapered structure to the micro bumps, changing them from cylindrical to conical shape. This dimensional change allows the bumps to be positioned closer together (reduced pitch) while the tapered geometry prevents lateral contact between adjacent bumps, eliminating bridge connections and maintaining reliability while achieving miniaturization

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent modifies the geometric parameters of the bumps by creating a tapered shape with a specific angle. This parameter change enables the bumps to maintain electrical connection functionality while reducing the horizontal distance between them, allowing finer pitch without bridge connections and thus achieving package miniaturization without sacrificing reliability

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If bump pitch is reduced to increase bump density, then more bumps can be provided for electrical connections, but bridge connection between bumps increases

Engineering Contradiction:
Improvenumber of bumpsVSAvoidelectrical connection reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

By transforming the bump geometry from cylindrical to tapered, the patent enables increased bump quantity per area while the tapered shape's narrowing profile prevents lateral bridge connections, allowing higher density without compromising electrical connection reliability

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Quantity of substance

If micro bump size is reduced to increase bump density, then fine-pitch pads can be connected, but manufacturing precision requirements increase

Engineering Contradiction:
Improvebump densityVSAvoidbump formation precision
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The tapered geometry parameter enables smaller effective bump footprint while maintaining manufacturability. The gradual taper allows for controlled formation processes that are more tolerant to variations, achieving high bump density without proportionally increasing manufacturing precision requirements

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20260020162A1Substrate structure and method of manufacturing the same
Publication Date: 2026.01.15 CHIPBOND TECH
  • US20260020162A1 patent drawing
  • US20260020162A1 patent drawing
  • US20260020162A1 patent drawing

AI summary

A substrate structure includes a substrate, UBMs and tapered micro bumps. A passivation layer of the substrate has a passivation opening, and a pad is visible from the passivation opening. A recession of each of UBMs is formed in the passivation opening and electrically connected to the pad. A root of each of the tapered micro bumps is located in the recession, and a contacting portion of each of the tapered micro bumps protrudes the recession. Each of the tapered micro bumps includes an insulating tapered part, a conductive layer and a bonding layer. The conductive layer covers the insulating tapered part and is electrically connected to the UBM. The bonding layer covers the conductive layer and is electrically connected to the conductive layer. The maximum outer diameter of each of the tapered micro bumps is not greater than 20 μm.