Tapered TSVs in Semiconductor Packages for Thermal Management
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Solution Overview
Problem
The miniaturization of electronic devices has led to challenges in heat dissipation and data transmission speed and reliability in semiconductor devices, particularly due to the limitations in through via connections during packaging, which affect the electrical performance of semiconductor devices.
Innovation Solution
The use of a ceramic substrate with specifically designed via holes formed using a diode-pumped solid state (DPSS) laser for improved heat dissipation and seed material deposition, combined with conductive material patterning to create through substrate vias (TSVs) that facilitate better electrical connections and thermal conductivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional through via connections are used in semiconductor packaging, then manufacturing process is simpler, but heat dissipation and data transmission speed deteriorate
Solution Approach 1:
The patent changes the geometric parameters of the via holes by forming tapered via holes with controlled aspect ratios and diameter variations. The via holes have different diameters at the top surface versus the bottom surface of the substrate, creating an optimized shape that improves both thermal conduction and electrical signal transmission while maintaining manufacturability through laser drilling processes.
2Temperature
If via hole diameter is increased to improve heat dissipation, then thermal conductivity improves, but manufacturing precision and electrical performance may deteriorate
Solution Approach 1:
The patent employs asymmetric via hole geometry where the via holes are tapered rather than cylindrical. The via holes have a larger diameter at one end and a smaller diameter at the other end, creating an asymmetric shape that optimizes both heat dissipation cross-section and electrical connection quality while being formable through laser drilling with appropriate parameter control.
3Speed
If tapered via holes are formed to improve electrical performance, then data transmission speed improves, but manufacturing complexity increases
Solution Approach 1:
The patent replaces conventional mechanical drilling methods with laser drilling technology to form tapered via holes. The laser beam can directly create the desired tapered geometry through controlled ablation, eliminating the need for complex mechanical tooling or multi-step machining processes, thereby reducing manufacturing complexity while achieving the required via hole shape for improved electrical performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the reliability and electrical performance of semiconductor devices by improving heat dissipation and data transmission speed through the use of tapered via holes and conductive patterns, leading to more efficient semiconductor packages.
Implementation Method 1
a diode-pumped solid state (DPSS) laser for improved heat dissipation and seed material deposition
Data Source
AI summary
A semiconductor package and a manufacturing method are provided. The semiconductor package includes a carrier substrate, a through substrate via (TSV), a first conductive pattern, and an encapsulated die. The TSV penetrates through the carrier substrate and includes a first portion and a second portion connected to the first portion, the first portion includes a first slanted sidewall with a first slope, the second portion includes a second slanted sidewall with a second slope, and the first slope is substantially milder than the second slope. The first conductive pattern is disposed on the carrier substrate and connected to the first portion of the TSV. The encapsulated die is disposed on the carrier substrate and electrically coupled to the TSV through the first conductive pattern.