Tapered Via Plating Adhesion in Thin PCBs
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Solution Overview
Problem
The challenge in printed circuit boards is to reduce void generation and improve metal plating adhesion in through-hole vias while achieving thinning, as thin conductive layers formed by electroless plating can lead to insufficient adhesion and risk of plating detachment due to stress from deformation.
Innovation Solution
A printed circuit board design featuring a tapered through-hole with a conductive layer on the inner surface and metal plating layers on both surfaces, where the insulating layer thickness is between 5 μm and 50 μm, and the conductive layer thickness is between 0.05 μm and 0.5 μm, increasing the inner surface area for improved plating adhesion and reducing voids.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the conductive layer thickness is reduced to achieve thinning, then productivity and production efficiency are improved, but the adhesion of metal plating deteriorates and electrical resistance increases
Solution Approach 1:
The patent applies local quality by creating a tapered through-hole structure where the hole diameter varies along the depth, being larger at the entrance and smaller at the bottom. This localized geometric variation increases the inner surface area of the through-hole, providing more anchoring points for the metal plating to adhere to, thereby improving plating adhesion even when the conductive layer is thin.
2Productivity
If the conductive layer thickness is reduced to achieve thinning, then productivity and production efficiency are improved, but the electrical resistance of the conductive layer increases
Solution Approach 1:
The tapered through-hole structure creates local geometric variation that increases the effective surface area for conduction. By enlarging the hole diameter at the entrance relative to the bottom, the patent provides a larger cross-sectional area for electrical current flow, compensating for the reduced conductive layer thickness and maintaining acceptable electrical resistance.
3Productivity
If the insulating layer thickness is reduced to achieve thinning, then productivity and production efficiency are improved, but the structural integrity during deformation deteriorates
Solution Approach 1:
The patent creates a composite structure consisting of the insulating layer, conductive layer, and metal plating layers forming a through-hole via. This composite construction provides enhanced mechanical strength and structural integrity, allowing the insulating layer to be thinner while maintaining overall structural stability during board deformation through the reinforcing effect of the metal plating.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces voids in through-hole vias and enhances metal plating adhesion, even with extremely thin insulating layers, by increasing the inner surface area and maintaining structural integrity during deformation.
Implementation Method 1
This conductive layer is generally formed by electroless plating
Implementation Method 2
Well-known examples of methods for forming through-hole vias in a printed circuit board include a method of applying electrolytic plating to a substrate having through-holes
Data Source
AI summary
A printed circuit board according to one aspect of the present invention includes an insulating layer having a through-hole, a conductive layer laminated on an inner circumferential surface of the through-hole, and metal plating layers laminated on a surface of the conductive layer facing opposite the insulating layer and laminated on both surfaces of the insulating layer, wherein an average thickness of the insulating layer is greater than or equal to 5 μm and less than or equal to 50 μm, wherein an average thickness of the metal plating layers is greater than or equal to 3 μm and less than or equal to 50 μm, wherein a hole diameter of the through-hole gradually increases from a first end of the through-hole at one surface of the insulating layer to a second end of the through-hole at another surface of the insulating layer, wherein the hole diameter of the through-hole at the first end is greater than or equal to 1.5 times, and less than or equal to 2.5 times, the average thickness of the metal plating layers, and wherein the hole diameter of the through-hole at the second end is greater than or equal to 1.1 times, and less than or equal to 2 times, the hole diameter of the through-hole at the first end thereof.