TARMAC Hardware Trojan Detection via Maximal Clique Sampling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods for detecting hardware Trojans, particularly those with extremely rare trigger conditions, are inefficient and unsuitable for large designs due to exponential complexity and scalability issues, as they require vast numbers of random or constrained-random test vectors and are ineffective in activating rare trigger conditions.
Innovation Solution
The approach maps the trigger activation problem to a maximal clique cover problem, utilizing satisfiability solvers to generate test vectors that cover maximal cliques, resulting in efficient and scalable test generation through the Trigger Activation by Repeated Maximal Clique sampling (TARMAC) method.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional validation methods or existing statistical test generation methods are used, then the detection process is simple, but the ability to detect stealthy Trojans with extremely rare trigger conditions is insufficient
Solution Approach 1:
The patent replaces traditional mechanical/random test generation approaches with a graph-theoretic approach. It constructs a graph where nodes represent trigger conditions and edges represent test vectors that activate them, then uses maximal clique algorithms to efficiently generate test vectors. This substitution of the problem domain from random search to graph theory enables systematic coverage of rare trigger conditions without exponential complexity.
Solution Approach 2:
The patent segments the complex task of detecting all possible Trojans into manageable components by representing trigger conditions as nodes in a graph and grouping them into maximal cliques. This segmentation allows the system to handle large numbers of potential Trojans systematically through graph algorithms rather than exhaustive search, reducing overall complexity while maintaining comprehensive detection capability.
2Reliability
If vast numbers of random or constrained-random test vectors are generated, then trigger coverage may improve, but the scalability to large designs is lost due to exponential complexity
Solution Approach 1:
The patent replaces the mechanical process of generating vast numbers of random test vectors with a graph-theoretic approach. By constructing a graph of trigger conditions and using maximal clique algorithms, the system achieves complete trigger coverage through a polynomial-time process rather than exponential random search, enabling scalability to large designs with millions of potential trigger conditions.
Solution Approach 2:
The patent changes the fundamental parameter of test generation from the number of random vectors (which scales exponentially) to the size of maximal cliques in the trigger condition graph (which scales polynomially). This parameter transformation enables the system to handle large designs efficiently while maintaining comprehensive trigger coverage.
3Ease of operation
If existing statistical test generation methods are used, then the process is relatively simple, but the ability to activate extremely rare trigger conditions is insufficient
Solution Approach 1:
The patent performs preliminary graph construction and maximal clique identification before actual test vector generation. By pre-processing the trigger conditions into a structured graph representation and identifying maximal cliques in advance, the system enables systematic activation of rare trigger conditions through a straightforward sampling process, combining operational simplicity with effective rare trigger detection.
Data Source
AI summary
An exemplary method for generating a test vector to activate a Trojan triggering condition includes the operations of obtaining a design graph representation of an electronic circuit; constructing a satisfiability graph from the design graph representation, wherein the satisfiability graph includes a set of vertices representing rare signals of the electronic circuit and satisfiability connections between the vertices; finding a plurality of maximal satisfiable cliques in the satisfiability graph, wherein a maximal satisfiable clique corresponds to a triggering condition for a payload of the electronic circuit; generating a test vector for each of the maximal satisfiable cliques; and performing a test for the presence of a hardware Trojan circuit in the electronic circuit using the generated test vectors as input signals.