Taylor Series Coefficient Storage for Floating Point Processing

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Solution Overview

Problem

Conventional processing apparatuses for Taylor series operations face performance degradation due to the overhead of transferring coefficient data from main memory to cache memory and pressure on the load/store pipeline, caused by the need for floating point load instructions during Taylor series calculations.

Innovation Solution

A processing apparatus that stores coefficient data for Taylor series operations in a dedicated memory, allowing direct access and execution without the need for floating point load instructions, thereby eliminating data transfer overhead and pipeline pressure.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If coefficient data is stored in main memory and accessed via floating point load instructions, then the processing apparatus can perform Taylor series operations, but the throughput of the load/store pipeline and instruction issue stage deteriorates due to data transfer overhead

Engineering Contradiction:
ImproveTaylor series operation speedVSAvoiddata transfer overhead time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent segments the memory system into main memory and a dedicated coefficient storage unit (such as a coefficient table or register file). This segmentation allows coefficient data to be stored separately from general-purpose memory, enabling direct access without involving the main memory-load pipeline path. The coefficient storage unit is specifically designed to hold Taylor series coefficients, separating the data access path for coefficients from the general load/store pipeline.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary component (coefficient storage unit, coefficient table, or dedicated register) that acts as a buffer between main memory and the floating point multiply-add unit. This intermediary pre-stores coefficient data locally, allowing the computation unit to access coefficients directly without requiring data transfer through the load pipeline. The intermediary eliminates the bottleneck by providing immediate access to frequently used coefficient data.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If floating point load instructions are executed to load coefficient data into registers, then Taylor series calculations can be performed, but pressure on the load/store pipeline and instruction issue stage increases

Engineering Contradiction:
Improvecalculation throughputVSAvoidpipeline pressure
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-loading and storing coefficient data in the dedicated coefficient storage unit before computation is needed. The coefficients are prepared and positioned in the storage unit in advance, so when a Taylor series operation is required, the data is already available immediately. This eliminates the need for runtime load instructions and prevents pipeline pressure during actual computation.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The dedicated coefficient storage unit serves multiple purposes: it stores coefficients for various mathematical functions (sin, cos, exp, log, etc.), supports different Taylor series degrees, and provides direct access to the floating point multiply-add unit. This multi-functional storage unit replaces the need for separate load operations for each coefficient, reducing overall pipeline pressure while maintaining versatility.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8655935B2Processing apparatus and control method performing taylor series operation associated with executing floating point instruction
Publication Date: 2014.02.18 FUJITSU LTD
  • US8655935B2 patent drawing
  • US8655935B2 patent drawing
  • US8655935B2 patent drawing

AI summary

A processing apparatus comprising a register that stores operand data, a register data reading section that reads operand data stored in the register, a coefficient table set storage section that stores a coefficient table storing Taylor series operation coefficient data, a coefficient data reading section that reads the Taylor series coefficient data from the coefficient table set storage section using the degree information of the Taylor series and the coefficient table identification information and a floating point multiply-adder that executes the Taylor series operation using the coefficient data read by the coefficient data reading section, data read from the register.