TCAM Compute-in-Memory MAC Array for Data Transfer Bottlenecks

Solution Overview

Problem

The bottleneck of data transfer between processors and memory devices in massively parallel neural networks leads to reduced computational throughput and increased energy consumption, especially in deep learning applications.

Innovation Solution

A compute-in-memory (CIM) device utilizing a ternary content-addressable memory (TCAM) array performs MAC operations by integrating multiplication and accumulation within the memory array, reducing the need for data transfer and enabling high computational throughput and lower energy consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data transfer between processor and memory array is used for computation, then computational flexibility is maintained, but computational throughput decreases and energy consumption increases

Engineering Contradiction:

Improvecomputational throughputVSAvoidenergy consumption

Core Design Contradiction:

ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent merges the computation function with the memory array by implementing MAC operations directly within the memory cells. The memory array performs multiply-accumulate operations using the stored weight values and input signals, combining storage and computation functions in a single integrated structure. This eliminates the need to transfer data between separate processor and memory components, thereby increasing computational throughput and reducing energy consumption associated with data movement.

Inventive Principle:

Principle #5Merging (Combining)

2Productivity

If data transfer between processor and memory array is used for computation, then computational flexibility is maintained, but computational throughput decreases

Engineering Contradiction:

Improvecomputational throughputVSAvoiddata transfer infrastructure

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The patent merges the computation function with the memory array by implementing MAC operations directly within the memory cells. The memory array performs multiply-accumulate operations using the stored weight values and input signals, combining storage and computation functions in a single integrated structure. This eliminates the need to transfer data between separate processor and memory components, thereby increasing computational throughput and reducing energy consumption associated with data movement.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The memory array is designed to serve multiple functions: it acts as both storage for weight values and as a computational unit for performing MAC operations. The same memory structure that stores data also performs computation on that data, eliminating the need for separate processing infrastructure and simplifying the overall system architecture.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If TCAM cells store Don't Care values, then search flexibility is improved, but read leakage currents increase

Engineering Contradiction:

Improvesearch flexibilityVSAvoidread leakage currents

Core Design Contradiction:

Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent extracts the harmful read leakage current from the system by introducing a compensation mechanism. A compensation current is generated that is equal in magnitude but opposite in polarity to the leakage current, and this compensation current is injected into the bit line to cancel out the harmful leakage effect. This allows TCAM cells to continue storing Don't Care values for flexible pattern matching while eliminating the detrimental leakage currents.

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The patent converts the harmful read leakage current into a beneficial compensation opportunity. By measuring and characterizing the leakage current, the system generates an equal and opposite compensation current that not only eliminates the harm but also improves the overall read operation reliability. The harmful leakage becomes the basis for creating a precise compensation mechanism.

Inventive Principle:

Principle #22Blessing in disguise (Convert harm into benefit)

Data Source

PatentEP4071761B1Method and apparatus for performing a mac operation in a memory array

Publication Date: 2026.02.25 MEDIATEK SINGAPORE PTE LTD

Figure 1
Figure 2
Figure 3A

AI summary

Aspects of the present disclosure are directed to devices and methods for performing MAC operations using a TCAM array as a compute-in-memory (CIM) device that can enable higher computational throughput, higher performance and lower energy consumption compared to computation using a processor outside of a memory array. In some embodiments, weights in a weight matrix may be programmed in SRAMs of a TCAM bit cell array. Each SRAM may operate as a multiplier that performs a multiplication between the stored weight to an input activation value applied at a search line in the TCAM bit cell array. The two SRAMs within a TCAM bit cell may operate independently to receive independently two input activation values on their respective select lines, and to perform a multiplication operation with the stored weight in each respective SRAM