TCAM Macro Cell Testing Wiring Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current TCAM macro cell testing configurations for semiconductor devices are complex and inefficient, requiring numerous wirings and circuit configurations, which are not suitable for incorporation into semiconductor devices due to poor wiring properties and high complexity.
Innovation Solution
A TCAM macro cell configuration that reduces the number of test signal wirings by selecting match lines based on word line levels and using a scan input circuit to input test search data, allowing for efficient testing without significantly increasing circuit complexity or wiring.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional TCAM macro cell testing configurations are used, then testing coverage can be achieved, but the number of wirings and circuit configurations increases significantly, leading to poor wiring properties and high complexity
Solution Approach 1:
The match line selection circuit is designed to perform dual functions: during normal operation it selects match lines based on word line levels for standard TCAM functionality, and during test operation it selects match lines for comprehensive testing. This multi-functionality eliminates the need for separate dedicated test selection circuits, reducing overall device complexity while maintaining thorough testing coverage
Solution Approach 2:
The test signal wirings are merged with the normal operation wirings by using the same match line selection circuit and match lines for both testing and normal operation. The scan input circuit integrates test data input into the existing architecture, combining test and operational functions into shared circuitry, thereby reducing the total number of wirings and circuit configurations
2Reliability
If comprehensive test configurations are implemented, then testing thoroughness improves, but the number of test signal wirings increases, degrading wiring properties
Solution Approach 1:
The match line selection circuit serves universal purposes by handling both normal match line selection and test match line selection through the same hardware structure. This eliminates the need for separate test-dedicated match line selection wiring, achieving comprehensive testing thoroughness without proportionally increasing wiring complexity
Solution Approach 2:
The TCAM macro cell uses its own internal match lines and selection circuits for testing purposes, rather than requiring external dedicated test infrastructure. The scan input circuit leverages the existing data input pathways, allowing the circuit to test itself using its own resources, thereby reducing the need for additional test signal wirings
Data Source
Figure 1
Figure 2~3
Figure 4
AI summary
An object of the present invention is to provide a highly-reliable content addressable memory. Provided is a content addressable memory including: a plurality of CAM cells; a word line joined to the CAM cells; a plurality of bit lines joined to the CAM cells; a plurality of search lines joined to the CAM cells; a match line joined to the CAM cells; a match amplifier joined to the match line; and a selection circuit that can select the output of the match amplifier in accordance with the value of the word line.