Time-to-Digital Converter Binning for DNL Error Averaging
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Solution Overview
Problem
Existing time-to-digital converters in time-of-flight sensors suffer from differential non-linearity errors due to device mismatches and layout-dependent effects, leading to inaccurate distance measurements.
Innovation Solution
A time-to-digital converter circuit is designed with a plurality of delay stages forming a delay line, event counters, an encoder circuit to sequentially trigger different delay stages, and a binning circuit to associate events with event counters, thereby mitigating systematic errors through averaging.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If large devices are used to reduce device-mismatch effects, then measurement precision improves, but device complexity and die size increase
Solution Approach 1:
The delay line is divided into multiple delay stages, and the system uses multiple event counters instead of a single large device. This segmentation allows the system to achieve accurate time-to-digital conversion while maintaining smaller individual component sizes and reducing overall device complexity.
Solution Approach 2:
Multiple event counters are combined to process time measurements collectively. By averaging the outputs of multiple counters, the system reduces differential non-linearity errors and achieves high measurement precision without requiring a single large complex device.
2Measurement precision
If complex circuitry is used to correct device mismatch errors, then measurement precision improves, but device complexity increases
Solution Approach 1:
The system uses the delay line output to control which event counter is active, creating a feedback mechanism that distributes measurements across multiple counters. This feedback approach reduces systematic errors without requiring complex correction circuitry, as the error mitigation is achieved through the natural operation of the segmented system.
3Measurement precision
If multiple event counters are used to average errors, then measurement precision improves, but device complexity increases
Solution Approach 1:
The time-to-digital conversion function is segmented across multiple event counters, each handling a portion of the measurement range. This segmentation enables error averaging while keeping individual counter complexity low and allowing parallel operation that actually reduces overall system complexity compared to a single complex counter.
Data Source
AI summary
A time-to-digital converter circuit is disclosed, the time-to-digital converter circuit including a plurality of delay stages connected to form a delay line, a plurality of event counters, an encoder circuit for triggering the delay line, and a binning circuit for associating an event with an event counter from plurality of event counters. The binning circuit selects the event counter based on a signal from the delay line, and wherein the encoder circuit is configured to sequentially trigger a different delay stage of the plurality of delay stages. Also disclosed is a time-of-flight sensor implementing the time-to-digital converter circuit, and an associated apparatus and method.