Frequency Measurement Using TDC Phase Sampling and Cycle Counting

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Solution Overview

Problem

Existing digital frequency measurement techniques face a trade-off between measurement speed and resolution, with high resolution requiring longer measurement times and making them prone to environmental frequency drift, leading to inaccurate results.

Innovation Solution

The use of a dynamic range time-to-digital converter (TDC) for fractional frequency estimation, combined with a cycle counter, to enhance measurement speed and precision by resolving aliasing ambiguities and enabling faster, more accurate frequency measurements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If high-resolution frequency measurement is performed using conventional digital techniques, then measurement precision is improved, but measurement time increases and the system becomes prone to environmental frequency drift

Engineering Contradiction:
Improvefrequency measurement resolutionVSAvoidmeasurement time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The frequency measurement is segmented into two independent components: integer frequency measurement using a cycle counter and fractional frequency measurement using a time-to-digital converter (TDC). The cycle counter measures the integer part of the frequency by counting reference clock cycles during one period of the input signal, while the TDC measures the fractional part by timing the phase difference between the input signal and a divided version of itself. This segmentation allows both integer and fractional components to be measured simultaneously without requiring extended measurement times, thereby achieving high resolution while maintaining fast measurement speed.

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If conventional digital frequency measurement techniques are used, then device complexity is reduced, but measurement precision and speed cannot be simultaneously improved

Engineering Contradiction:
Improvefrequency measurement resolutionVSAvoidmeasurement system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The measurement system merges a cycle counter and a time-to-digital converter (TDC) into a unified frequency measurement apparatus. The cycle counter handles the integer frequency component while the TDC handles the fractional component, and both are combined through an addition operation to produce the total frequency measurement. This merging allows the system to achieve high precision and fast measurement speed simultaneously, overcoming the limitations of conventional techniques that rely on a single measurement method.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If longer measurement times are used to achieve high resolution, then frequency measurement precision is improved, but the system becomes more susceptible to environmental frequency drift

Engineering Contradiction:
Improvefrequency measurement resolutionVSAvoidmeasurement accuracy under environmental variation
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The system performs preliminary frequency division using a programmable divider before the TDC measurement stage. The input signal is divided by a programmable factor to bring it into a suitable frequency range for the TDC, ensuring optimal measurement conditions from the outset. This preliminary action allows the TDC to accurately measure the fractional frequency component within a single reference clock period, eliminating the need for extended measurement times that would expose the system to environmental drift.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentEP3975430B1High-resolution and agile frequency measurement
Publication Date: 2023.07.12 INTEL CORP
  • EP3975430B1 patent drawingFigure 1
  • EP3975430B1 patent drawingFigure 2
  • EP3975430B1 patent drawingFigure 3~4

AI summary

An apparatus for generating a frequency estimate of an output signal includes a reference signal generator configured to generate a reference clock signal. The apparatus includes frequency estimation circuitry configured to generate a cycle count based frequency estimation of the output signal based on the reference clock signal and a clock cycle count of the output signal. The frequency estimation circuitry further generates a fractional frequency estimation of the output signal based on the reference clock signal and a plurality of time-to-digital conversion phase samples of the output signal. The frequency estimation circuitry further generates the frequency estimate of the output signal using the cycle count based frequency estimation within a range and a frequency error determined from the fractional frequency estimation. The plurality of time-to-digital conversion phase samples and the cycle count based frequency estimation use a same number of reference clock cycles of the reference clock signal.