Template Wafer Manufacturing Using Graphite Separation Layer
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Solution Overview
Problem
The high costs associated with manufacturing non-silicon semiconductor devices, such as silicon carbide, gallium arsenide, or gallium nitride, due to the limited availability and expense of wafers in standard 200 mm or 300 mm diameters, necessitate the development of more efficient manufacturing processes.
Innovation Solution
A method involving the use of a carrier wafer with a semiconductor device layer, where the carrier wafer is cut parallel to the semiconductor device layer, allowing for the separation and processing of the semiconductor device without damaging it, using techniques like sawing, water jet cutting, or laser cutting, and employing a separation layer like graphite for efficient material removal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If non-silicon semiconductor wafers are processed in separate manufacturing lines, then the specific processing requirements for non-silicon semiconductors are met, but manufacturing costs increase significantly
Solution Approach 1:
The patent makes the manufacturing line universal by enabling it to process both silicon and non-silicon semiconductor wafers using the same equipment and process steps. The carrier wafer technique allows non-silicon wafers to be handled and processed identical to silicon wafers, eliminating the need for separate manufacturing lines and reducing costs while maintaining processing quality
2Adaptability or versatility
If standard 200 mm or 300 mm diameter wafers are used for non-silicon semiconductors, then compatibility with existing manufacturing processes is achieved, but wafer costs increase due to limited availability
Solution Approach 1:
The patent segments the wafer structure into a carrier wafer (providing mechanical support and compatibility) and a thin non-silicon semiconductor layer (providing the active device functionality). This segmentation allows the use of smaller, cheaper non-silicon layers while maintaining compatibility with standard wafer processing, thereby reducing material costs while preserving process adaptability
3Ease of manufacture
If the carrier wafer is cut parallel to the semiconductor device layer, then the semiconductor device layer is separated from the carrier, but there is a risk of damaging the semiconductor device layer
Solution Approach 1:
The patent introduces a separation layer as an intermediary between the carrier wafer and the semiconductor device layer. This separation layer is specifically designed to be cut easily by the saw blade while protecting the underlying semiconductor device layer from damage. The separation layer acts as a sacrificial element that facilitates clean separation without compromising device integrity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces production costs by enabling the use of smaller, less expensive wafers and allows for the efficient processing of non-silicon semiconductor devices, maintaining the integrity and stability of the semiconductor device layer during high-temperature processes.
Implementation Method 1
separating the compound wafer by cutting the carrier wafer along a plane between the first side and the second side of the carrier wafer
Data Source
AI summary
A method for manufacturing a semiconductor device includes implanting gas ions in a donor wafer and bonding the donor wafer to a carrier wafer to form a compound wafer. The method also includes subjecting the compound wafer to a thermal treatment to cause separation along a delamination layer and growing an epitaxial layer on a portion of separated compound wafer to form a semiconductor device layer. The method further includes cutting the carrier wafer.