Tensor Processor Parallel Processing Element Array
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Solution Overview
Problem
Existing processor architectures are inefficient in handling the increasing volumes of tensor calculations required in deep learning and computer vision applications due to their limited processing power, especially in portable devices.
Innovation Solution
A tensor processor with a processing element array and a processing element controller that performs tensor operations in parallel, utilizing multiple tensor operation modules such as Matricized Tensor times Khatri-Rao, Hadamard, and Tensor times matrices chain operations, and re-routing processing elements through multiplexers and control signals to accelerate computations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional multiplication and addition logic functions are used for tensor calculations, then the necessary calculations can be performed, but the processing efficiency deteriorates due to the large volumes of operations required from multiple dimensions
Solution Approach 1:
The patent divides the tensor processing task into multiple independent processing elements (PEs) arranged in a grid array. Each PE handles a specific portion of the tensor calculation, allowing parallel execution of multiple operations simultaneously. This segmentation enables the system to process large volumes of tensor data more efficiently by distributing the computational workload across multiple units rather than using a single sequential processor.
Solution Approach 2:
The patent transitions from traditional sequential processing to a two-dimensional array of processing elements, adding spatial dimensionality to the computation. This dimensional change allows multiple tensor operations to be performed in parallel across different spatial locations, significantly reducing the time required for high-dimensional tensor calculations while maintaining computational accuracy.
2Productivity
If existing processor architectures are used in portable devices, then the devices have limited processing power, but they are unable to effectively handle the newly expected volumes of tensor calculations
Solution Approach 1:
The patent designs a universal processing element array where each PE can be configured to perform multiple types of tensor operations (matrix multiplication, addition, etc.) depending on the control signals received. This multi-functionality allows a single hardware architecture to handle diverse tensor calculation requirements without requiring separate dedicated circuits for each operation type, thereby managing complexity while enhancing capability.
Solution Approach 2:
The patent implements dynamic control of the processing element array through control signals that can reconfigure the array's operational mode. The system can dynamically adjust the number of active processing elements, the configuration of data flow paths, and the operational parameters of individual PEs based on the specific tensor calculation requirements. This dynamic adaptability enables the architecture to efficiently handle varying volumes of tensor data without requiring permanent over-design for maximum capacity.
3Loss of time
If a processing element array is used for parallel tensor operations, then the time required for tensor operations is reduced, but the device complexity increases due to multiple processing elements and controllers
Solution Approach 1:
The patent merges the control functions into a centralized control unit that manages multiple processing elements through a unified control architecture. Rather than having separate control circuits for each PE, the control unit coordinates all PEs through standardized control signals, reducing the overall complexity of the control system while maintaining the parallel processing capabilities that reduce operation time.
Data Source
AI summary
A tensor processor comprising a processing element array, the array having a plurality of processing elements arranged to individually perform operations on variables of a tensor, wherein each of processing elements are individually controlled by a processing element controller to perform tensor operations on a tensor. The processing elements controller are controlled by a series of tensor operation modules to perform a specific tensor operation.