Ternary Content-Addressable Memory With Switch-Based Compare Circuit

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional ternary content-addressable memories face issues with read/write disturb during search operations due to their complex compare circuits and limited read port capabilities.

Innovation Solution

A ternary content-addressable memory design featuring two read ports and a simple compare circuit, utilizing NMOS or PMOS transistors as switches between search lines and a match line, with static random-access memory cells connected to control electrodes, allowing for independent read and write operations without disturb issues.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional ternary content-addressable memory uses complex compare circuits (NAND or NOR logic), then the search operation can be performed, but read/write disturb issues occur during search operations

Engineering Contradiction:
Improveread/write stabilityVSAvoidcompare circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the compare circuit logic from the memory cell structure itself and implements it externally using switch elements. The memory cells only need to drive switches, which then perform the comparison function by conditionally discharging the match line. This separation eliminates the read/write disturb issue while maintaining the search function.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces switch elements as intermediary components between the memory cells and the match line. These switches act as mediators that conditionally connect the memory cells to the match line based on the search criteria, eliminating the need for complex integrated compare circuits within the memory array.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Adaptability or versatility

If conventional ternary content-addressable memory uses integrated compare circuits within the memory array, then search functionality is achieved, but the read port capability is limited and read/write disturb occurs

Engineering Contradiction:
Improveread port capabilityVSAvoidread/write stability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent segments the memory system into independent memory cells and separate switch elements. Each memory cell can be independently accessed through dedicated read paths, enabling multiple read ports. The segmentation allows independent read and write operations without interfering with each other, eliminating read/write disturb while enhancing read port capability.

Inventive Principle:
Principle #1Segmentation

3Ease of manufacture

If conventional ternary content-addressable memory uses complex compare logic integrated with memory cells, then search operation is possible, but device complexity increases and manufacturing becomes more difficult

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidcircuit structure complexity
Core Design Contradiction:
Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent uses simple switch elements that can be easily manufactured and replicated, replacing complex integrated compare circuits. The switch-based approach allows for easier manufacturing while achieving the same search functionality, as switches are simpler to fabricate and integrate than full compare logic circuits.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS9484096B1Ternary content-addressable memory
Publication Date: 2016.11.01 NATIONAL TSING HUA UNIVERSITY
  • US9484096B1 patent drawing
  • US9484096B1 patent drawing
  • US9484096B1 patent drawing

AI summary

A ternary content-addressable memory comprises a first switch, a first static random-access memory cell, a second switch and a second static random-access memory cell. The first switch is connected between a first search line and a match line. The first switch has a first control electrode. The first static random-access memory cell has a first storage node connected to the first control electrode of the first switch. The second switch is connected between a second search line and the match line. The second switch has a second control node. The second static random-access memory cell has a second storage node connected to the second control electrode of the second switch.