Ternary Inverter Transistor With Gate-Independent Constant Current

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Solution Overview

Problem

Existing binary logic-based digital systems face limitations in bit density due to increased leakage currents and power consumption, and ternary logic devices require complex circuit structures and multiple voltage sources.

Innovation Solution

A transistor design with a constant current formation layer generating a current independent of gate voltage, comprising a substrate, source/drain patterns, a gate electrode, and a gate insulating layer, along with channel patterns and spacers, allowing for a ternary inverter with independent current from input voltage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If CMOS devices are miniaturized to increase bit density, then information processing capability is improved, but leakage currents and power consumption increase due to quantum tunneling effects

Engineering Contradiction:
Improvebit densityVSAvoidleakage current
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent introduces a new device parameter - the barrier height of the Schottky barrier diode - to control current flow characteristics. By adjusting the metal-semiconductor interface properties and doping concentrations, the device achieves different resistance states that enable ternary logic operation while maintaining low leakage currents through the Schottky barrier mechanism

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite material structures including metal-semiconductor interfaces for Schottky barriers, multiple semiconductor layers with different doping types (n-type and p-type), and insulating layers. This composite structure enables the device to achieve both high bit density through miniaturization and low leakage currents through the Schottky barrier effect

Inventive Principle:
Principle #40Composite materials

2Adaptability or versatility

If standard ternary inverter is implemented with multiple voltage sources, then ternary logic functionality is achieved, but circuit structure complexity increases

Engineering Contradiction:
Improveternary logic functionalityVSAvoidcircuit structure
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent designs a universal ternary inverter circuit that can perform ternary logic operations using a single voltage source. The circuit incorporates both n-type and p-type Schottky barrier diodes that work together to achieve three-state logic (0, 1, 2) functionality, eliminating the need for multiple voltage sources while maintaining full ternary logic capability

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the functions of multiple voltage sources into a single voltage source configuration. By combining the n-type and p-type Schottky barrier diodes in a integrated circuit structure, the patent achieves ternary logic operation with simplified power supply requirements, reducing the number of external components and interconnections needed

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The design achieves a constant current in transistors and ternary inverters that is independent of gate voltage, overcoming bit density limitations and reducing complexity in circuit structures.

Implementation Method 1

the constant current formation layer generates a constant current between the drain pattern and the substrate

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

the gate insulating layer separates the channel pattern and the gate electrode from each other

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Data Source

PatentUS12520539B2Transistor, method for manufacturing same, and ternary inverter comprising same
Publication Date: 2026.01.06 TERNELL CO LTD
  • US12520539B2 patent drawing
  • US12520539B2 patent drawing
  • US12520539B2 patent drawing

AI summary

A transistor includes: a substrate; a constant current formation layer provided on the substrate; a pair of source/drain patterns provided on the constant current formation layer; a gate electrode provided between the pair of source/drain patterns; a channel pattern extending in a direction between the pair of source/drain patterns; and a gate insulating layer surrounding the channel pattern, wherein the channel pattern penetrates the gate insulating layer and the gate electrode and is electrically connected to the source pattern and the drain pattern, the gate insulating layer separates the channel pattern and the gate electrode from each other, the constant current formation layer generates a constant current between the drain pattern and the substrate, and the constant current is independent from a gate voltage applied to the gate electrode.