Hardware Tessellation Units for Continuous Detail Rendering
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Solution Overview
Problem
Existing tessellation methods often result in undesirable visual artefacts due to discontinuous changes in tessellation when the level of detail is changed smoothly.
Innovation Solution
The development of hardware tessellation units that include a sub-division logic block for subdividing patches into sub-patches, a decision logic block for determining whether to sub-divide patches, and a patch stack that operates on a first-in-last-out scheme to control the order of tessellation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of primitives is increased to improve the level of detail, then the accuracy of surface approximation is improved, but the processing effort required to render the scene increases
Solution Approach 1:
The tessellation process is segmented into multiple hierarchical levels, where patches are progressively subdivided into sub-patches across different levels. This allows the system to generate varying numbers of primitives based on local detail requirements rather than uniformly increasing complexity everywhere, thus improving surface accuracy where needed while controlling overall processing effort.
Solution Approach 2:
Different levels of tessellation detail are applied to different regions of the scene based on local requirements. Areas closer to the viewer or with more intricate shapes receive higher levels of subdivision, while distant or simple areas use coarser tessellation. This local quality approach ensures high accuracy where necessary while minimizing processing effort in less critical regions.
2Productivity
If tessellation is performed ahead of time to compute multiple views at different levels of detail, then rendering efficiency is improved, but memory requirements for storing primitive data increase
Solution Approach 1:
The tessellation data is organized in a nested hierarchical structure where level 0 contains the base mesh, level 1 contains subdivisions of selected patches, level 2 contains further subdivisions of selected sub-patches, and so on. Each level nests within the previous level, allowing the system to store only the incremental difference data rather than complete duplicate datasets for each level of detail, thus reducing memory requirements while maintaining rendering efficiency.
Solution Approach 2:
Tessellation data for multiple levels is pre-computed and stored in a hierarchical structure, but only the essential incremental data for each level is retained. This preliminary action allows runtime selection of appropriate detail levels without storing complete high-detail versions of all patches, optimizing the balance between rendering efficiency and memory usage.
3Stability of the object's composition
If the level of detail is changed smoothly, then visual continuity is improved, but visual artefacts occur due to discontinuous tessellation changes
Solution Approach 1:
The tessellation system dynamically adjusts the level of detail across multiple hierarchical levels based on viewing distance and importance. As the viewer moves or the camera rotates, the system dynamically selects which patches to subdivide at which levels, ensuring smooth transitions in visual detail without abrupt changes. This dynamic multi-level approach prevents visual artifacts by maintaining consistent detail quality across view changes.
Data Source
Figure 1A~1B
Figure 2
Figure 3A~3B
AI summary
Described herein are a number of different hardware tessellation units. All of the hardware tessellation units described herein comprise a sub-division logic block that comprises hardware logic arranged to perform a sub-division of a patch into two (or more) sub-patches. All of the hardware tessellation units described herein also comprise a decision logic block that is configured to determine whether a patch is to be sub-divided or not and one or more hardware elements that control the order in which tessellation occurs. In various examples, this hardware element is a patch stack that operates a first-in-last-out scheme and in other examples, there are one or more selection logic blocks that are configured to receive patch data for more than one patch or sub-patch and output the patch data for a selected one of the received patches or sub-patches.