Test Apparatus Domain Synchronization Control

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Solution Overview

Problem

Existing test apparatuses face limitations in synchronizing domains during operation, requiring a common multiple of operational clock phases and period signals, which complicates pattern program creation and imposes restrictions.

Innovation Solution

A test apparatus with a master domain and slave domains, where the master domain generates a master period signal and the slave domain generates a slave period signal, using control signals to resume generation without initializing phase data, allowing synchronization at a timing that is a common multiple of the operational clocks' periods and frequencies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If synchronization is achieved at a timing that is a common multiple of operational clock phases and period signals, then domain synchronization is achieved, but pattern program creation becomes complicated and restricted

Engineering Contradiction:
Improvedomain synchronizationVSAvoidpattern program creation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent changes the synchronization approach from requiring common multiple timing of operational clocks to using a hold signal that can be applied at any timing. The period signal generation is controlled by a hold signal that stops or resumes period signal generation without requiring synchronization to common multiple timings, thereby simplifying pattern program creation while maintaining domain synchronization capability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent separates the period signal generation into independent controllable units with individual hold signals for each domain. Each domain's period signal generating section can be independently stopped or resumed, allowing flexible synchronization without requiring coordinated common multiple timing across all domains, thus reducing pattern program complexity

Inventive Principle:
Principle #1Segmentation

2Reliability

If the master period signal generating section initializes phase data upon receiving control signal, then synchronization is achieved, but periodicity of master domain is lost

Engineering Contradiction:
Improvedomain synchronizationVSAvoidperiodicity of master domain
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent applies different behaviors to master and slave domains: the slave period signal generating section initializes phase data upon receiving the control signal to achieve synchronization, while the master period signal generating section does not initialize phase data, thereby maintaining its periodicity. This local differentiation resolves the contradiction between synchronization and periodicity maintenance

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8700964B2Test apparatus and synchronization method
Publication Date: 2014.04.15 ADVANTEST CORP
  • US8700964B2 patent drawing
  • US8700964B2 patent drawing
  • US8700964B2 patent drawing

AI summary

A test apparatus that tests a device under test, including (i) a master domain that includes a master period signal generating section, which generates a master period signal, where the master domain operates based on the master period signal and (ii) a slave domain that includes a slave period signal generating section, which generates a slave period signal, where the slave domain operates based on the slave period signal. The master period signal generating section receives a control signal and resumes generation of the master period signal, which is on hold, and the slave period signal generating section receives the control signal, initializes phase data of the slave period signal, and resumes generation of the slave period signal, which is on hold.