Test Case Scheduling for Cache Coherency Validation
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Solution Overview
Problem
Existing methods for verifying and validating computing systems, particularly those with multiple processors, face challenges in efficiently generating test cases to cover various states and transitions, leading to significant time spent on test pattern generation at the expense of execution time, which can reduce the detection of data corruption bugs and system defects.
Innovation Solution
A method that generates test cases with streams of instructions, allocates cache lines to ensure different processors access unique memory locations, and schedules these test cases across various configurations to achieve comprehensive test coverage without regenerating test cases, thereby efficiently stressing snoop filtering mechanisms and cache coherency protocols.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If large amounts of test cases are generated to cover different coherency protocol states, then test coverage is improved, but test pattern generation time increases significantly
Solution Approach 1:
The patent applies preliminary action by pre-generating a comprehensive set of test cases that can be reused across multiple configurations. Instead of generating test cases for each configuration separately, the system generates them once in advance, storing them for subsequent reuse. This significantly reduces the time spent on test pattern generation while maintaining comprehensive test coverage across different coherency protocol states and processor configurations.
2Reliability
If test cases are regenerated for each processor configuration, then test coverage is improved, but productivity decreases due to repeated generation
Solution Approach 1:
The patent implements universality by creating test cases that are configuration-agnostic and can be applied universally across multiple processor configurations. The test cases are designed to validate coherency protocol states without being tied to specific hardware thread counts or cache line allocations. This allows the same test case set to serve multiple configurations, eliminating the need for regeneration and significantly improving testing throughput while maintaining comprehensive coverage.
3Reliability
If more time is spent on test pattern generation, then test coverage is improved, but execution time available for defect detection decreases
Solution Approach 1:
By performing test pattern generation as a preliminary action before execution phases, the patent separates the generation and execution processes in time. The comprehensive test cases are generated once in advance and stored for reuse, allowing the execution phase to focus entirely on running tests and detecting defects without the overhead of regeneration. This time separation ensures both comprehensive coverage and sufficient execution time for defect detection.
Data Source
AI summary
Embodiments disclose techniques for scheduling test cases without regeneration to verify and validate a computing system. In one embodiment, a testing engine generates a test case for a plurality of processors. Each test case includes streams of instructions. The testing engine also allocates at least one cache line associated with the streams of instructions of the generated test case such that each of the plurality of processors accesses different memory locations within the at least one cache line. The testing engine further schedules the generated test case for execution by the plurality of processors to achieve at least a first test coverage among the plurality of processors. The testing engine further re-schedules the generated test case for re-execution by the plurality of processors to achieve at least a second test coverage among the plurality of processors.