Semiconductor Test Pad Structure for Reduced Plasma Capture

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Solution Overview

Problem

In semiconductor manufacturing, large pad structures in testkey structures capture plasma during etching processes, which can impair semiconductor device performance and hinder monitoring, as the plasma is not effectively removed.

Innovation Solution

A pad structure with a metal interconnection design featuring insulated first and second sections, where the pad is electrically connected to the first section but insulated from the second section, reducing the metal area susceptible to plasma capture, and a testing method using probe needles to apply voltages or currents to the test pattern.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If the pad structure is designed with a large cross-sectional area to facilitate probe needle contact, then the ease of operation is improved, but the plasma capture increases leading to impaired semiconductor device performance

Engineering Contradiction:
Improveease of probe needle contactVSAvoidplasma capture
Core Design Contradiction:
Ease of operationVSObject-affected harmful factors

Solution Approach 1:

The metal interconnection structure is divided into two electrically insulated sections: a first section (including the pad) that facilitates probe needle contact, and a second section that is spatially separated to reduce plasma capture. The insulation between sections allows independent optimization of each section's function.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The harmful function of plasma capture is extracted from the pad structure by separating the second metal section from the pad structure. This extracted section can be independently positioned or removed without affecting the pad's primary function of facilitating probe contact.

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If the metal layer area is increased to ensure proper electrical connection, then the reliability is improved, but the plasma capture increases leading to harmful effects on semiconductor devices

Engineering Contradiction:
Improveelectrical connection reliabilityVSAvoidplasma capture
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The metal interconnection structure is segmented into electrically insulated first and second sections. The first section maintains sufficient metal area for reliable electrical connection to the pad, while the second section is separated to minimize plasma capture, thus resolving the contradiction between connection reliability and plasma capture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

An insulating structure is introduced as an intermediary between the first and second metal sections. This intermediary maintains electrical insulation while allowing both sections to be optimally sized for their respective functions without compromising reliability or increasing plasma capture.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If the pad structure uses a conventional single-section metal interconnection, then the device complexity is reduced, but the plasma capture cannot be effectively mitigated

Engineering Contradiction:
Improvemetal interconnection structureVSAvoidplasma capture
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The metal interconnection structure is segmented into two electrically insulated sections, increasing structural complexity but enabling effective plasma capture mitigation. The segmentation allows the pad structure to simultaneously maintain electrical connection reliability and reduce harmful plasma effects.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11906577B2Pad structure and testkey structure and testing method for semiconductor device
Publication Date: 2024.02.20 WUHAN XINXIN SEMICON MFG CO LTD
  • US11906577B2 patent drawing
  • US11906577B2 patent drawing
  • US11906577B2 patent drawing

AI summary

The present disclosure provides a pad structure and a testkey structure and a testing method for a semiconductor device. The pad structure includes: an insulating dielectric layer formed on a substrate; a metal interconnection structure formed in the insulating dielectric layer, the metal interconnection structure comprising a first section and a second section, which are insulated from each other; and a pad formed on the top of the insulating dielectric layer so as to be exposed therefrom at least at its top surface, electrically connected to the first section, and insulated from the second section. With this disclosure, reduced capture of plasma is achievable, mitigating adverse impact of plasma on the semiconductor device.