Tester Logic Circuit for Data Valid Window Identification
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Solution Overview
Problem
The increasing capacity of electronic devices has led to longer testing times, as conventional electronic device testers require storing and processing extensive data from multiple testing points to determine data valid windows, which increases testing and production time.
Innovation Solution
An electronic device tester with a pattern generator and finite-state machines that only stores and reports the first and last passing points of data valid windows, reducing the need for extensive data processing and simplifying the testing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional electronic device testers store and process extensive data from multiple testing points to determine data valid windows, then measurement precision is improved, but loss of time increases
Solution Approach 1:
The patent extracts only the essential information needed for data valid window determination - specifically the first and last passing points - while discarding the extensive intermediate testing data. This extraction approach maintains measurement precision by capturing the boundary definitions while dramatically reducing data processing time and resource requirements.
Solution Approach 2:
The patent implements preliminary action by using finite-state machine logic to identify and store the first and last passing points during the testing process itself, rather than collecting all data and processing it afterward. This real-time identification during the sweep test reduces post-processing time while maintaining accurate window determination.
2Measurement precision
If electronic device testers test electronic devices to identify testing range and store results for each point, then measurement precision is improved, but device complexity increases
Solution Approach 1:
The patent extracts only the critical boundary information (first and last passing points) from the complete testing range data. This extraction eliminates the need for complex software analysis of extensive datasets while maintaining precise identification of the data valid window boundaries through hardware-based finite-state machine logic.
Solution Approach 2:
The patent replaces the conventional software-based data processing system with a hardware-based finite-state machine implementation. This substitution moves the data processing function from complex software analysis to streamlined hardware logic, reducing device complexity while maintaining measurement precision.
3Measurement precision
If extensive data from multiple pins is stored and processed, then measurement precision is improved, but productivity decreases
Solution Approach 1:
The patent extracts only the essential boundary-defining data points (first and last passing points) from extensive multi-pin testing data. This extraction maintains accurate data valid window determination while dramatically reducing the volume of data that needs to be stored and processed, thereby increasing production throughput.
Solution Approach 2:
The patent performs preliminary identification of first and last passing points during the testing sweep itself using finite-state machine logic. This real-time processing during testing eliminates the need for extensive post-test data analysis, accelerating the overall testing process and improving productivity without sacrificing measurement accuracy.
Data Source
AI summary
A tester including an interface configured to interface with an electronic device and a logic circuit. The logic circuit includes a pattern generator and at least one finite-state machine and is configured to sequentially acquire read data from the electronic device at sequential testing points of a testing range for evaluating an operating parameter of the electronic device or the tester until a set of consecutive passing points having a first passing point and a last passing point is identified, in response to identifying the first passing point, write data within the logic circuit of the tester identifying the first passing point, in response to identifying the last passing point, write data within the logic circuit of the tester identifying the last passing point, and output only data identifying the first passing point and data identifying the last passing point to a software application.