Thin Film Transistor Array Panel Aperture Ratio Optimization
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Solution Overview
Problem
Existing thin film transistor substrates face challenges in increasing the aperture ratio of pixels while maintaining transistor performance, as well as enhancing capacitor capacitance without increasing the capacitor area, due to limitations in semiconductor materials and metal wiring efficiency.
Innovation Solution
A thin film transistor substrate design featuring oxide semiconductor transistors with reduced size, utilizing transparent conductive materials like ITO and IZO for electrodes, and a layered structure that minimizes undercut during wet-etching, allowing for thinner electrodes and reduced transistor size without compromising performance, and increasing capacitor capacitance through parallel connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the thickness of metal wiring is increased to reduce resistivity, then electrical conductivity is improved, but undercut occurs during wet-etching which reduces current flow efficiency and increases transistor size
Solution Approach 1:
The patent changes the material parameter from conventional metal to transparent conductive oxide materials (ITO, IZO, INO) with different electrical and etching properties. These materials achieve low resistivity without the undercut problem during wet-etching, as they form uniform films and etch cleanly without lateral erosion, thus resolving the contradiction between conductivity and dimensional precision
Solution Approach 2:
The patent employs composite material structures where transparent conductive oxide layers are combined with other functional layers (semiconductor, insulator, organic EL layers) to create a multi-layered thin film transistor structure. This composite approach allows optimization of each layer's properties independently, achieving both good electrical conductivity and precise dimensional control
2Manufacturing precision
If transistor size is increased to compensate for undercut, then manufacturing precision is maintained, but parasitic capacitance increases and aperture ratio decreases
Solution Approach 1:
By changing to transparent conductive oxide materials with superior etching characteristics, the patent eliminates undercut formation entirely. This allows maintaining precise wiring dimensions without increasing transistor size, thereby preserving both manufacturing precision and aperture ratio
3Reliability
If oxide semiconductor transistors with high electron mobility are used, then charge transport efficiency is improved, but manufacturing complexity increases compared to amorphous silicon
Solution Approach 1:
The patent uses oxide semiconductor materials (IGZO, IZO, INO) that can be deposited at lower temperatures than polysilicon crystallization, simplifying the manufacturing process. These materials achieve high electron mobility through their inherent material properties rather than complex crystallization processes, thus improving charge mobility while reducing manufacturing complexity
Data Source
AI summary
A thin film transistor substrate according to an exemplary embodiment includes: a substrate; a gate electrode disposed on the substrate; a gate insulating layer disposed on the gate electrode; an oxide semiconductor disposed on the gate insulating layer; a first interlayer insulating layer disposed on the oxide semiconductor; a data line disposed on the first interlayer insulating layer; a second interlayer insulating layer disposed on the data line; a source electrode disposed on the second interlayer insulating layer and connected with the oxide semiconductor and the data line through a first contact hole through the second interlayer insulating layer; and a drain electrode disposed on the second interlayer insulating layer and connected with the semiconductor through a second contact hole through the second interlayer insulating layer.