TFT Array Substrate Resin Passivation Layer Process

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Solution Overview

Problem

The manufacturing process of TFT-LCD array substrates is complex and costly, leading to high production costs and product defects due to the sequential formation of channel protective and resin passivation layers.

Innovation Solution

A manufacturing method where the resin passivation layer directly covers the source/drain metal, omitting the production of a channel protective layer, and involving a series of patterning processes to form the necessary electrodes and via holes, simplifying the process and reducing costs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a channel protective layer and resin passivation layer are sequentially formed after source/drain electrode formation, then the channel is protected during manufacturing, but the manufacturing cost increases and the process becomes complex

Engineering Contradiction:
Improvechannel protectionVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention extracts and removes the channel protective layer from the manufacturing process. The resin passivation layer is directly formed over the source/drain electrodes without requiring a separate channel protective layer, thereby simplifying the process while maintaining channel protection through the passivation layer's inherent protective properties

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention merges the functions of the channel protective layer and resin passivation layer into a single resin passivation layer. This layer simultaneously provides channel protection and passivation functions, reducing the total number of layers and manufacturing steps while maintaining the necessary protective capabilities

Inventive Principle:
Principle #5Merging (Combining)

2Manufacturing precision

If a channel protective layer is formed, then manufacturing precision is improved, but production cost increases

Engineering Contradiction:
Improvepattern formation precisionVSAvoidproduction cost
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The invention removes the channel protective layer from the manufacturing sequence, eliminating the associated material costs and processing expenses while maintaining sufficient manufacturing precision through the direct formation of the resin passivation layer over the source/drain electrodes

Inventive Principle:
Principle #2Taking out (Extraction)

3Manufacturing precision

If multiple patterning processes are performed, then manufacturing precision is improved, but productivity decreases

Engineering Contradiction:
Improveelectrode and via hole precisionVSAvoidmanufacturing throughput
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The invention combines the channel protection function with the resin passivation layer formation process, merging two separate manufacturing steps into one. This reduces the total number of patterning processes required while maintaining the necessary precision for electrode and via hole formation, thereby improving manufacturing throughput

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS9543324B2Array substrate, display device and manufacturing method of the array substrate
Publication Date: 2017.01.10 BOE TECHNOLOGY GROUP CO LTD
  • US9543324B2 patent drawing
  • US9543324B2 patent drawing
  • US9543324B2 patent drawing

AI summary

An array substrate, a display device and a manufacturing method of the array substrate. The array substrate includes: a base substrate (1) and a plurality of pixel units located on the base substrate (1), each of the pixel units including a thin film transistor unit. The thin film transistor unit includes: a gate electrode located on the base substrate (1), a gate insulating layer (3) located on the gate electrode, an active layer (4) located on the gate insulating layer (3) and opposed to the gate electrode in position, an ohmic layer (5) located on the active layer (4), a source electrode (6a) and a drain electrode (6b) that are located on the ohmic layer (5) and a resin passivation layer (8) that are located on the source electrode (6a) and the drain electrode (6b) and covers the substrate.