Thin Film Transistor Array Panel Single Contact Hole Design
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Solution Overview
Problem
In liquid crystal displays, the size of the region occupied by the gate conductor affects transmittance, and existing manufacturing methods are complex, leading to decreased efficiency.
Innovation Solution
A thin film transistor array panel design that connects the common electrode with the common voltage line through a single contact hole, simplifying the manufacturing process and reducing the size of the light-blocking region, thereby improving transmittance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If the gate conductor region size is decreased to improve transmittance, then transmittance is improved, but manufacturing complexity increases
Solution Approach 1:
The patent merges the connection of the common electrode to the common voltage line with the existing contact hole structure. Specifically, the common electrode is connected to the common voltage line through the same contact hole that connects the pixel electrode to the drain electrode, eliminating the need for separate contact holes and simplifying the manufacturing process while maintaining small gate conductor region size for high transmittance
Solution Approach 2:
The contact hole structure serves multiple functions simultaneously: it connects the pixel electrode to the drain electrode and also connects the common electrode to the common voltage line. This multi-functional design reduces the number of manufacturing steps and maintains the reduced gate conductor region size, thereby improving transmittance without increasing manufacturing complexity
2Illumination intensity
If the gate conductor region size is decreased, then transmittance is improved, but the number of contact holes increases
Solution Approach 1:
The patent combines multiple electrical connections into a single contact hole. The same contact hole that connects the pixel electrode to the drain electrode is also used to connect the common electrode to the common voltage line, thereby reducing the total number of contact holes from two to one while maintaining the small gate conductor region size for improved transmittance
Data Source
AI summary
A thin film transistor array panel includes: a substrate; a gate line and a common voltage line on the substrate and electrically separated from each other; a gate insulating layer on the gate line and the common voltage line; a first passivation layer on the gate insulating layer; a common electrode on the first passivation layer; a second passivation layer on the common electrode; and a pixel electrode and a connecting member on the second passivation layer and electrically separated from each other. A first contact hole and a second contact hole are defined in the first and second passivation layers. The pixel electrode and the drain electrode are connected to each other through the second contact hole. The connecting member and the common electrode are connected to each other through the first contact hole.