Thin-Film Transistor Array Substrate With Group IV Intermediate Layer

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Solution Overview

Problem

Thin-film transistors using oxide semiconductor active layers face device degradation due to hydrogen and oxygen diffusion from the gate insulating film during thermal treatment, leading to reliability issues and positive bias temperature stress.

Innovation Solution

Incorporating an intermediate layer made of a Group IV element, such as silicon, between the active layer and the gate insulating film to act as a barrier and prevent diffusion, while also adding hydrogen to bind excess oxygen and reduce electron capture.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If thermal treatment processes are performed after forming the active layer, gate insulating film, and gate electrode, then device characteristics are improved, but hydrogen and oxygen atoms diffuse from the gate insulating film into the active layer causing device degradation

Engineering Contradiction:
Improvedevice characteristicsVSAvoidhydrogen and oxygen diffusion
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

An intermediate layer is inserted between the active layer and the gate insulating film to act as a diffusion barrier. This intermediate layer prevents hydrogen and oxygen atoms from the gate insulating film from diffusing into the active layer during thermal treatment processes, thereby resolving the contradiction between improving device characteristics through thermal treatment and preventing harmful atomic diffusion.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If an intermediate layer is added between the active layer and gate insulating film to prevent diffusion, then device reliability is improved, but device structure becomes more complex

Engineering Contradiction:
Improvedevice reliabilityVSAvoiddevice structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The original structure of active layer directly contacting gate insulating film is segmented by inserting an intermediate layer. This segmentation creates distinct functional zones: the active layer for charge transport, the intermediate layer for diffusion barrier functionality, and the gate insulating film for electrical isolation. While this increases structural layers, each layer serves a specific function that collectively improves device reliability without excessive complexity.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively prevents device deterioration by blocking hydrogen and oxygen diffusion, reduces positive bias temperature stress, and enhances the reliability and performance of thin-film transistors.

Implementation Method 1

once the subsequent thermal treatment processes are performed, atomic diffusion occurs in which hydrogen or oxygen atoms in the gate insulating film 35 diffuse into the active layer 30

Methodology Applied
Scientific EffectDiffusion: Diffusion

Implementation Method 2

adding hydrogen to bind excess oxygen and reduce electron capture

Methodology Applied
Scientific EffectChemical Bonding: Chemical Bonding

Data Source

PatentUS10692975B2Thin-film transistor array substrate
Publication Date: 2020.06.23 LG DISPLAY CO LTD
  • US10692975B2 patent drawing
  • US10692975B2 patent drawing
  • US10692975B2 patent drawing

AI summary

A thin-film transistor according to an exemplary embodiment of the present invention comprises an active layer; an intermediate layer; a gate insulating film; a gate electrode; an interlayer insulating film; and source and drain electrodes. The active layer is positioned on a substrate, and the gate insulating film is positioned on the active layer. The gate electrode is positioned on the gate insulating film, and the interlayer insulating film is positioned on the gate electrode. The source and drain electrodes are positioned on the interlayer insulating film and connected to the active layer. The intermediate layer is positioned between the active layer and the gate insulating film, and made of an oxide semiconductor comprising a Group IV element.