Thin Film Transistor Array Substrate High Dielectric Constant Insulator
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Solution Overview
Problem
In high-resolution organic light-emitting display devices, the reduction in pixel size leads to non-uniform gradation presentation due to limited capacitor capacity, making it difficult to maintain uniform data voltage across pixels.
Innovation Solution
A thin film transistor array substrate is designed with specific dielectric materials and layer structures, including high dielectric constant materials like ZrO2 and TiO2, to enhance capacitor capacity and uniformity, along with optimized contact plug taper angles for improved etching quality and manufacturing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If pixel size is reduced to achieve high-resolution panel, then resolution is improved, but capacitor capacity becomes insufficient leading to non-uniform gradation presentation
Solution Approach 1:
The patent changes the dielectric constant parameter of the insulating layer material from conventional low dielectric constant materials to high dielectric constant materials (such as barium strontium titanium oxide, lead zinc niobate, or lead scandium tantalum oxide with dielectric constant greater than 100). This parameter change increases the capacitor capacity without increasing the physical size of the pixel, thereby maintaining uniform gradation presentation in high-resolution panels.
Solution Approach 2:
The patent employs composite material structures including multiple insulating layers with different dielectric constants, where a first insulating layer with low dielectric constant is combined with a second insulating layer with high dielectric constant. This composite structure optimizes both the capacitor capacity and the manufacturing process, allowing achievement of high resolution while maintaining gradation uniformity.
2Reliability
If capacitor capacity is increased to improve gradation uniformity, then gradation quality is improved, but pixel area must be increased which reduces resolution
Solution Approach 1:
Instead of increasing the physical area of the capacitor, the patent changes the dielectric constant parameter of the insulating layer material to high values (greater than 100). This allows the capacitor capacity to be increased while maintaining the same pixel area, thereby preserving high resolution while achieving uniform gradation presentation.
3Ease of manufacture
If conventional etching processes are used for contact plug formation, then manufacturing process is simple, but etching quality deteriorates due to inappropriate taper angles
Solution Approach 1:
The patent optimizes the etching parameters by controlling the taper angle of the contact plug to be within a specific range (30° to 60°). This parameter optimization improves the etching quality and subsequent filling process without adding complex manufacturing steps, thereby maintaining process simplicity while achieving better etching quality.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables enhanced brightness and gradation quality in grayscale for high-resolution panels by increasing capacitor capacity and ensuring uniform data voltage distribution across pixels, while simplifying the manufacturing process without additional photolithography steps.
Implementation Method 1
a second insulating layer disposed between the first conductive layer and the second conductive layer and including a second material layer having a second dielectric constant that is greater than the first dielectric constant
Data Source
AI summary
A thin film transistor array substrate includes: a first conductive layer including first lines for transmitting data signals to the thin film transistors; a second conductive layer disposed on the first conductive layer and including second lines for supplying a driving voltage to the thin film transistors; a first insulating layer disposed between a semiconductor layer and the first conductive layer and including a first material layer; a second insulating layer disposed between the first conductive layer and the second conductive layer and including a second material layer having a dielectric constant greater than that of the first material layer; and a contact plug penetrating the second insulating layer and the first insulating layer, and connecting the second conductive layer to the semiconductor layer. A taper angle of the contact plug in the second material layer is greater than that of the contact plug in the first material layer.