TFT Array Substrate Single Mask LTPS Leakage Control
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Solution Overview
Problem
The high carrier mobility of low-temperature poly-silicon (LTPS) in TFTs leads to significant electric leakage issues, increasing the cost and complexity of manufacturing due to the need for specialized masks in the lightly doped area design.
Innovation Solution
A manufacturing method for TFT array substrates that uses a single mask to form both the source and drain pattern layers, blocking one side of the channel area to create the lightly doped area, eliminating the need for additional mask design and reducing costs, while allowing for flexible adjustment of the lightly doped area size to control leakage current effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a specialized mask is designed to block the area outside the region for the lightly doped area, then the lightly doped area can be formed with precise positioning, but the manufacturing cost increases
Solution Approach 1:
The patent combines the formation of source/drain pattern layers and lightly doped areas into a single photolithography step using one mask. The mask simultaneously defines both the source/drain regions and the lightly doped area, eliminating the need for a separate specialized mask and reducing manufacturing cost while maintaining positioning precision.
Solution Approach 2:
The single mask serves multiple functions: it blocks areas outside the source/drain regions to define their boundaries, and simultaneously blocks the area outside the lightly doped region to define its boundary. This multi-functional mask design eliminates the need for additional specialized masks.
2Manufacturing precision
If a specialized mask is designed for the lightly doped area, then the lightly doped area can be formed with correct dimensions, but the device complexity increases
Solution Approach 1:
The patent merges the mask design for source/drain patterns and lightly doped area into a single unified mask. This single mask design simultaneously controls both features, reducing the overall mask design complexity compared to managing multiple separate specialized masks.
Solution Approach 2:
The mask is designed to perform multiple functions: defining source/drain boundaries and defining the lightly doped area boundary. This universal mask approach simplifies the overall manufacturing process complexity while maintaining dimensional accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method reduces manufacturing costs by eliminating the need for extra mask design and provides design flexibility to adjust leakage current effects, improving the efficiency of the TFT array substrate production process.
Implementation Method 1
adopting a mask to form a source pattern layer and a drain pattern layer on the separation layer by photolithography processes
Implementation Method 2
adopting the same mask to form a lightly doped area on the other side of the channel area not blocked by the mask
Data Source
AI summary
The disclosure provides a manufacturing method for TFT array substrate, a TFT array substrate and a display device. The manufacturing method includes following steps: in sequence, forming a gate pattern layer, a gate insulating layer, a patterned poly-silicon layer, a separation layer on s substrate, and adopting a mask to form a source pattern layer and a drain pattern layer on the separation layer by photolithography processes. The source pattern layer and the drain pattern layer are connected to the patterned poly-silicon layer. The mask blocks one side of the channel area, and the same mask is adopted to form a lightly doped area on the other side of the channel area not blocked by the mask. The disclosure may reduce production costs and has great design flexibility.