TFT Array Substrate Multi-Tone Masking for Reduced Exposure Steps
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Solution Overview
Problem
The existing manufacturing process for TFT-LCD array substrates is complex and costly due to the high number of masks and exposure times required, which hampers productivity and equipment utilization.
Innovation Solution
The process employs a multi-tone masking (MTM) technique combined with photoresist lifting-off treatments to reduce the number of masks and exposure times, achieving the formation of an array substrate with a simplified structure and reduced processing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple masks and exposure times are used in the preparation process of a TFT array substrate, then the manufacturing precision and pattern quality are improved, but the device complexity and manufacturing cost increase
Solution Approach 1:
The patent combines multiple patterning functions into a single mask by integrating different pattern regions (pixel electrode patterns, common electrode patterns, TFT electrode patterns) onto one mask plate. This merging approach reduces the total number of masks from multiple separate masks to just one or two composite masks, thereby reducing device complexity while maintaining the ability to achieve precise patterns through selective etching processes
Solution Approach 2:
The patent segments the mask plate into different regions with different light transmission characteristics (transparent regions, semi-transparent regions, opaque regions) to achieve different patterning effects in different areas. This segmentation allows a single mask to perform multiple patterning functions that previously required multiple separate masks, reducing overall device complexity while preserving manufacturing precision
2Manufacturing precision
If multiple masks and exposure times are used in the preparation process of a TFT array substrate, then the manufacturing precision and pattern quality are improved, but the productivity and equipment utilization deteriorate
Solution Approach 1:
By merging multiple patterning operations into a single exposure step using a multi-region mask, the patent eliminates the need for sequential multiple exposure processes. This reduces the total processing time and increases equipment utilization, thereby improving productivity while maintaining pattern quality through the carefully designed mask regions
Solution Approach 2:
The patent performs preliminary patterning by forming the pixel electrode pattern first, then uses this as a basis for subsequent common electrode and TFT electrode patterning in a streamlined sequence. This preliminary action approach, combined with the multi-region mask technique, reduces the total number of exposure steps required while maintaining precise pattern formation
3Manufacturing precision
If multiple masks and exposure times are used in the preparation process of a TFT array substrate, then the manufacturing precision and pattern quality are improved, but the manufacturing cost increases
Solution Approach 1:
The patent merges multiple patterning functions into one or two composite masks, significantly reducing the number of masks that need to be purchased, stored, and managed. This merging strategy directly reduces material costs and manufacturing overhead while maintaining the ability to produce high-quality patterns through the integrated mask design
Solution Approach 2:
The mask plate is designed with multi-functional regions that can pattern different electrode types (pixel, common, TFT) and perform different patterning operations (transparent, semi-transparent, opaque regions) within a single mask. This universality eliminates the need for multiple specialized masks, reducing manufacturing cost while preserving pattern quality
Data Source
AI summary
Embodiments of the present invention provide an array substrate, a manufacturing method thereof, and a display device. The array substrate comprises: a pixel region, a data-line pad region and a gate-line pad region; the pixel region comprises: a pixel electrode, a gate electrode of a TFT, source and drain electrodes of the TFT, a connection electrode, and a common electrode; the data-line pad region comprises: an insulating layer, a semiconductor layer, a data line, and a data-line connection pad; the data line and the source and drain electrodes are of a same layer and a same material; and the gate-line pad region comprises: a gate line, an insulating layer, and a gate-line connection pad; the gate line and the gate electrode are of a same layer and a same material; and the gate-line connection pad and the source and drain electrodes are of a same layer and a same material. The array substrate can reduce the number of masks and exposure times, thereby reducing manufacturing costs and improving production efficiency.