Thin Film Transistor Edge Field Management via Asymmetric LDD Doping

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Solution Overview

Problem

Existing thin film transistor (TFT) structures that attempt to suppress irregularities in source-drain current characteristics by increasing edge channel resistance can lead to instability and narrow channel widths, affecting the linearity of brightness and color in display devices.

Innovation Solution

A TFT structure with a semiconductor layer, gate insulating film, and gate electrode, featuring a channel, drain, and source, where a Light Doped Drain (LDD) is formed with a first LDD area at the center and a second LDD area at the edge, with the second LDD area being twice or more the width of the first in the channel length direction, to manage edge field irregularities without compromising stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If the edge channel resistance is increased to suppress irregular current, then the Ids characteristics irregularity is reduced, but the channel width becomes narrow and ON current is suppressed

Engineering Contradiction:
ImproveIds characteristics uniformityVSAvoidON current
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The LDD structure implements local quality by creating different doping concentrations in different regions: the first LDD area (center) has a first doping concentration while the second LDD area (edge) has a second doping concentration that is lower than the first. This local variation in doping concentration allows the center region to provide sufficient resistance for current uniformity while the edge region maintains lower resistance to preserve ON current, resolving the contradiction between current uniformity and ON current magnitude.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If the edge channel resistance is increased to suppress irregular current, then the Ids characteristics irregularity is reduced, but the TFT characteristics stability becomes poor

Engineering Contradiction:
ImproveIds characteristics uniformityVSAvoidTFT characteristics stability
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The dual-region LDD structure applies local quality by differentiating doping concentrations between center and edge regions. The center LDD area provides the resistance needed for current uniformity, while the edge LDD area with lower doping concentration maintains stability by preventing excessive resistance buildup at the edges, thus resolving the contradiction between current uniformity and characteristics stability.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The invention employs asymmetry by creating an asymmetric doping profile within the LDD structure, where the doping concentration varies from the center toward the edges. This asymmetric design allows different functional requirements (current uniformity at center, stability at edges) to be satisfied simultaneously, resolving the contradiction between Ids uniformity and TFT stability.

Inventive Principle:
Principle #4Asymmetry

Data Source

PatentUS10056495B2Thin film transistor and display device using the same
Publication Date: 2018.08.21 MAGNOLIA WHITE CORP
  • US10056495B2 patent drawing
  • US10056495B2 patent drawing
  • US10056495B2 patent drawing

AI summary

The purpose of the invention is to eliminate an abnormal current at an edge of a semiconductor layer in a thin film transistor. The invention is: A thin film transistor having a semiconductor layer comprising: a channel, a drain and a source are formed in the semiconductor layer, the channel has a channel length and a channel width, a LDD (Light Doped Drain) is formed between the channel and the drain or between the channel and the source, the LDD including a first LDD area, which is formed at a center of the LDD in the direction of the channel width, and a second LDD area, which is formed at an edge of the LDD in the direction of the channel width, wherein a width of the second LDD area in the channel length direction is bigger than a width of the first LDD area in the channel length direction.