Thin Film Transistor Buffer Layer Contact Hole Design
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Solution Overview
Problem
In existing display panels, particularly OLED panels, the dielectric layer of thin film transistors is prone to cracks, and the high impedance at the junction of the drain electrode and light shielding layer affects performance, making the bonding process difficult and impairing product yield and performance.
Innovation Solution
A method for manufacturing a thin film transistor involving the formation of a light shielding layer, a buffer layer, an active layer, a gate insulating layer, and electrode layers, where the drain electrode is connected to the light shielding layer through a contact hole in the buffer layer, reducing the number of blocks under the dielectric layer and simplifying the etching process, thereby reducing impedance and preventing cracks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the dielectric layer is formed covering multiple blocks including the active layer and gate insulating layer, then the thin film transistor structure is complete, but the dielectric layer is prone to cracks reducing product yield
Solution Approach 1:
The gate insulating layer is segmented to cover only the channel region and not the peripheral region, creating a simplified structure with fewer blocks. This segmentation prevents the dielectric layer from spanning multiple blocks, thereby eliminating cracks and improving reliability.
2Reliability
If the drain electrode and light shielding layer are bonded through multiple layers, then the electrical connection is established, but the impedance is high and the bonding process is difficult
Solution Approach 1:
A contact hole is preliminarily formed in the buffer layer to expose the light shielding layer before forming the drain electrode. This preliminary action creates a direct bonding path, reducing impedance and simplifying the subsequent drain electrode formation process.
Data Source
AI summary
A method for manufacturing a thin film transistor includes forming a light shielding layer and a buffer layer covering the light shielding layer on a substrate. The method includes forming an active layer including a peripheral region and a channel region. The method includes forming a gate insulating layer covering the channel region and forming a contact hole exposing the light shielding layer. The method includes forming a source region and a drain region disposed on both sides of the channel region. The method includes forming an electrode layer including a gate electrode, a source electrode and a drain electrode spaced apart one another. The method includes forming a dielectric layer covering the gate electrode, the source electrode, the drain electrode and the buffer layer.


