TFT Substrate Capacitor Interconnection Integration
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Solution Overview
Problem
The manufacturing of thin film transistor (TFT) substrates for organic light-emitting display apparatuses is complex and costly due to the need for multiple mask processes, which increases interference between capacitors and interconnections, limiting the width of components and complicating the manufacturing process.
Innovation Solution
A simplified manufacturing method for TFT substrates involves forming a capacitor with a lower electrode from the same material as the active layer and an upper electrode from the same material as the pixel electrode, with specific insulating layers and a connection layer to reduce interference and eliminate the need for additional masks, thereby simplifying the process and reducing manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple mask processes are used to manufacture TFT substrates, then manufacturing precision can be improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent combines the capacitor electrode pattern formation with the interconnection pattern formation into a single mask process. The capacitor electrode and interconnections are formed simultaneously using the same mask, eliminating the need for separate mask processes and reducing overall manufacturing complexity while maintaining pattern precision
Solution Approach 2:
The mask used in the patent serves multiple functions: it defines both the capacitor electrode patterns and the interconnection patterns in a single exposure step. This multi-functional mask approach reduces the total number of mask processes required while achieving the necessary manufacturing precision for both components
2Manufacturing precision
If additional masks are added to form capacitors or interconnections with specific width, then manufacturing precision can be improved, but manufacturing cost and time increase
Solution Approach 1:
The patent merges the capacitor electrode formation and interconnection formation into a single simultaneous process using one mask. This eliminates sequential processing steps, reducing manufacturing time while maintaining precise control over interconnection widths through the unified mask design
3Manufacturing precision
If multiple mask processes are used, then manufacturing precision can be improved, but manufacturing cost increases
Solution Approach 1:
By combining capacitor electrode and interconnection pattern formation into a single mask process, the patent reduces the total number of masks required. This directly lowers material costs and process costs while maintaining the necessary manufacturing precision through the integrated mask design
Solution Approach 2:
The mask is designed to perform multiple functions simultaneously: defining capacitor electrodes, defining interconnections, and controlling their relative positions. This multi-functionality reduces the total mask count and associated costs while achieving precise component patterns
4Ease of manufacture
If capacitor and interconnections are formed with standard processes, then manufacturing simplicity can be maintained, but interference between capacitor and interconnections increases
Solution Approach 1:
The patent applies local quality by forming the capacitor electrode and interconnections with different local characteristics within the same process. The mask design creates regions with different pattern densities and geometries optimized for each component type, reducing interference while maintaining overall process simplicity
Solution Approach 2:
The patent resolves interference issues by controlling the spatial arrangement and relative positioning of capacitor electrodes and interconnections in the planar dimension through the mask design. This dimensional control separates the components effectively without requiring additional processing steps
Data Source
AI summary
A thin film transistor (TFT) substrate, an organic light-emitting display apparatus including the TFT substrate, and a method of manufacturing the TFT substrate that enable simple manufacturing processes and a decrease in the interference between a capacitor and other interconnections are disclosed. The TFT substrate may include a substrate, a TFT arranged on the substrate, the TFT including an active layer, a gate electrode, a source electrode, and a drain electrode, a pixel electrode electrically connected to one of the source electrode and the drain electrode, and a capacitor including a lower capacitor electrode and an upper capacitor electrode, the lower capacitor electrode formed from the same material as the active layer and arranged on the same layer as the active layer, and the upper capacitor electrode formed from the same material as the pixel electrode.