Thin-Film Transistor Cu Buffer Layers for Low-Resistance Adhesion
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The poor adhesion of metal Cu in thin film transistors (TFTs) leads to poor performance and image quality in large-size, high-resolution flat panel display devices, as existing methods fail to adequately reduce the resistance of gate and data lines, resulting in delayed image signals.
Innovation Solution
A method is introduced where a conductive Cu alloy buffer layer is used between the semiconductor layer and the source/drain layer to enhance adhesion, and conductive metal oxide isolating layers are added to prevent metal atoms from capturing oxygen from the semiconductor layer, improving the TFT's performance and image quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal Cu is used to fabricate source electrodes, drain electrodes, gate lines and data lines to decrease resistance, then the resistance of these conductors is reduced, but the adhesion is poor leading to poor TFT performance
Solution Approach 1:
The patent employs a composite structure consisting of a Cu alloy buffer layer and a Cu electrode layer. The Cu alloy buffer layer (containing 0.1-30 at% of another metal) provides excellent adhesion to the semiconductor layer, while the Cu electrode layer provides low electrical resistance. This composite material approach resolves the contradiction by combining materials with complementary properties - the alloy layer sacrifices some electrical conductivity to gain adhesion, while the pure Cu layer maintains low resistance for signal transmission.
2Strength
If a buffer layer of Mo, Ti, Mo alloy or Ti alloy is used to improve the adhesion of Cu, then the adhesion is improved, but the TFT performance remains poor
Solution Approach 1:
The patent changes the compositional parameters of the buffer layer by using Cu alloys instead of conventional Mo or Ti alloys. Specifically, the buffer layer contains Cu as the base metal with 0.1-30 at% of another metal, which optimizes both adhesion strength and electrical conductivity. This parameter optimization allows the buffer layer to provide sufficient adhesion while maintaining good electrical contact, thereby improving overall TFT performance compared to conventional Mo or Ti buffer layers.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of Cu alloy buffer layers and metal oxide isolating layers significantly enhances the adhesion and performance of TFTs, reducing signal delay and improving image quality by maintaining the integrity of the semiconductor layer, thus addressing the limitations of existing TFT technologies.
Implementation Method 1
The adhesion of metal Cu is poor, and although a buffer layer of Mo, Ti, Mo alloy, Ti alloy or the like is typically used for improving the adhesion of Cu
Implementation Method 2
conductive metal oxide isolating layers are added to prevent metal atoms from capturing oxygen from the semiconductor layer
Data Source
Figure 1~2
Figure 3~5
Figure 6~7
AI summary
A thin film transistor and method for manufacturing the same, an array substrate and a display device are disclosed. The thin film transistor comprises a substrate; a gate electrode, a source electrode, a drain electrode and a semiconductor layer formed on the substrate; a gate insulating layer between the gate electrode and the semiconductor layer or between the gate electrode and the source and drain electrodes; an etching stop layer between the semiconductor layer and the source and drain electrodes having a source contact hole and a drain contact hole therein; and a source buffer layer between the source electrode and the semiconductor layer and a drain buffer layer between the drain electrode and the semiconductor layer. The source and drain electrodes are metal Cu electrodes, and the source and drain buffer layers are Cu alloy layer. The formation of the source and drain buffer layer improves the adhesion of the source and drain electrodes thereon to the semiconductor layer therebeneath, and thus improves the performance of the TFT and image quality.